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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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Age
Commit message (
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Author
2010-06-02
ARM: Make integer division by zero return a fault.
Gabe Black
2010-06-02
ARM: Add in some missing SCTLR fields.
Gabe Black
2010-06-02
ARM: Decode ARM unconditional MRC and MCR instructions.
Gabe Black
2010-06-02
ARM: Move the CP15 decode block into a function.
Gabe Black
2010-06-02
ARM: Decode the unconditional version of ARM fp instructions.
Gabe Black
2010-06-02
ARM: Move the FP decode blocks into functions.
Gabe Black
2010-06-02
ARM: Warn/ignore when TLB maintenance operations are performed.
Gabe Black
2010-06-02
ARM: Handle accesses to TLBTR.
Gabe Black
2010-06-02
ARM: Handle accesses to the DACR.
Gabe Black
2010-06-02
ARM: Handle accesses to TTBR0 and TTBR1.
Gabe Black
2010-06-02
ARM: Convert the CP15 registers from MPU to MMU.
Gabe Black
2010-06-02
ARM: Add some support for wfi/wfe/yield/etc
Ali Saidi
2010-06-02
ARM: Move PC mode bits around so they can be used for exectrace
Ali Saidi
2010-06-02
ARM: Add a traceflag to print cpsr
Ali Saidi
2010-06-02
ARM: Undef instruction on invalid user CP15 access
Ali Saidi
2010-06-02
ARM: Decode the VSTR instruction.
Gabe Black
2010-06-02
ARM: Implement the vstr instruction.
Gabe Black
2010-06-02
ARM: BXJ should be BX when there is no J support
Ali Saidi
2010-06-02
ARM: Make sure macroops aren't interrupted midinstruction.
Gabe Black
2010-06-02
ARM: Fix the implementation of the VFP ldm and stm macroops.
Gabe Black
2010-06-02
Simple CPU: Make the FloatRegs trace flag do something.
Gabe Black
2010-06-02
ARM: Fix up thumb decoding of coproc instructions.
Gabe Black
2010-06-02
ARM: Clean up some redundancy and fault behavior for unimplemented thumb MCR,...
Gabe Black
2010-06-02
CPU: Reset fetch offset after a exception
Ali Saidi
2010-06-02
ARM: Decode the VLDR instruction.
Gabe Black
2010-06-02
ARM: Implement the VLDR instruction.
Gabe Black
2010-06-02
ARM: Decode all the various forms of vmov.
Gabe Black
2010-06-02
ARM: Make VFP load/store and 64 bit move decode correspond with CP10 and CP11.
Gabe Black
2010-06-02
ARM: Implement the various versions of VMOV.
Gabe Black
2010-06-02
ARM: Add a new RegImmOp base class.
Gabe Black
2010-06-02
ARM: Add a RegRegImmOp base class.
Gabe Black
2010-06-02
ARM: Widen the immediate fields in the misc instruction classes.
Gabe Black
2010-06-02
ARM: Add a function to decode VFP modified immediate constants.
Gabe Black
2010-06-02
ARM: Add a function to decode SIMD modified immediate constants.
Gabe Black
2010-06-02
ARM: Add fp operands to operands.isa.
Gabe Black
2010-06-02
ARM: Decode the VMRS instruction.
Gabe Black
2010-06-02
ARM: Update the set of FP related miscregs.
Gabe Black
2010-06-02
ARM: Implement the VMRS instruction.
Gabe Black
2010-06-02
ARM: Decode the VMSR instruction.
Gabe Black
2010-06-02
ARM: Implement the VMSR instruction.
Gabe Black
2010-06-02
ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) regis...
Gabe Black
2010-06-02
ARM: Ignore attempts to disable coprocessors that aren't implemented anyway.
Gabe Black
2010-06-02
ARM: Implement the udiv instruction.
Gabe Black
2010-06-02
ARM: Implement the sdiv instruction.
Gabe Black
2010-06-02
ARM: Ignore writing a bad mode to CPSR with MSR.
Gabe Black
2010-06-02
ARM: Decode the CPS instruction.
Gabe Black
2010-06-02
ARM: Implement the CPS instruction.
Gabe Black
2010-06-02
ARM: Decode the SRS instruction.
Gabe Black
2010-06-02
ARM: Implement the SRS instruction.
Gabe Black
2010-06-02
ARM: Add a base class for SRS.
Gabe Black
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