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2007-04-21fixes for solaris compileAli Saidi
--HG-- extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
2007-04-21create base/fenv.c to standerdize fenv across platforms. It's a c file and ↵Ali Saidi
not a cpp file because c99 (which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment. src/arch/alpha/isa/fp.isa: src/arch/sparc/isa/formats/basic.isa: use m5_fesetround()/m5_fegetround() istead of fenv interface directly src/arch/sparc/isa/includes.isa: use base/fenv instead of fenv directly src/base/SConscript: add fenv to sconscript src/base/fenv.hh: src/base/random.cc: m5 implementation to standerdize fenv across platforms. --HG-- extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
2007-04-18update the stuff that's removed from the SConscriptsNathan Binkert
since things have moved around a bit --HG-- extra : convert_revision : 79322a65af6140d0c41aed0b381587eb05d72fd9
2007-04-18Move the turbolaser python simobject stuff into theNathan Binkert
encumbered directory --HG-- extra : convert_revision : 7062ce81183b989f0d922b00d02433633474a854
2007-04-18fix SIGUSR1 and SIGUSR2 by clearing the variables afterNathan Binkert
they're used --HG-- extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
2007-04-15Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head --HG-- extra : convert_revision : fd9a2d0e833dd47f55aad9c50c68431bc6d3e0a7
2007-04-15Update long test refs.Kevin Lim
tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini: tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.out: tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt: tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr: tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini: tests/long/30.eon/ref/alpha/tru64/o3-timing/config.out: tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt: tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr: tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini: tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.out: tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt: tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr: tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini: tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.out: tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt: tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stderr: tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini: tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.out: tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt: tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.out: tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr: Update refs. --HG-- extra : convert_revision : 19483a5a18e76338a3208a58d7460a922377acd3
2007-04-13Merge zizzer:/bk/newmemAli Saidi
into udhcp-macvpn-501.public.engin.umich.edu:/Users/ali/work/m5.newmem --HG-- extra : convert_revision : 38c2427790d27c64e69ac3223e76cabeeb765904
2007-04-13take a first stab at the release notesAli Saidi
AUTHORS: add sparc full system support to my list of accolades --HG-- extra : convert_revision : 1d3afaae2502306e44cd7fb251e763931a7e3ae9
2007-04-12Completely re-work how the scons framework incorporates swigNathan Binkert
and python code into m5 to allow swig an python code to easily added by any SConscript instead of just the one in src/python. This provides SwigSource and PySource for adding new files to m5 (similar to Source for C++). Also provides SimObject for including files that contain SimObject information and build the m5.objects __init__.py file. --HG-- extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
2007-04-12Don't allow Source to accept multiple arguments, lists,Nathan Binkert
or automatically do Split(). It isn't used anywhere, and isn't very consistent with the python features that are about to be added. Do accept SCons.Node.FS.File arguments though. --HG-- extra : convert_revision : 0f3bb0e9e6806490330eea59a104013042b4dd49
2007-04-12Fix NextEthernetAddr.Nathan Binkert
unproxy() needs to return a new object otherwise all instances will use the same value. This fix is more or less unique to NextEthernetAddr because its use of the proxy stuff is a bit different than everything else. --HG-- extra : convert_revision : 2ce452e37d00b9ba76b6abfaec0ad2e0073920d7
2007-04-12Add a scons hack to force symlinks to the swig .i filesNathan Binkert
to be created --HG-- extra : convert_revision : 826cc692614528f987c80c3410cb025190f0a4e0
2007-04-11Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : 50102b96ba07b2b132d649a111268ee1f08c2147
2007-04-11Make trying to execute macroops fail with a better error message.Gabe Black
--HG-- extra : convert_revision : e81c0337d6db4b5a33381ed19686750bbb9d9178
2007-04-11Create a filter and a union to translate the SPARC instruction ↵Gabe Black
implementations from using doubles to using concatenated singles. --HG-- extra : convert_revision : 609ba35bbb13cbd1998e93957cb051461442d1f9
2007-04-10Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : c5275ef3e53393496a2ebe05b2f516884bb392f9
2007-04-10Even if you don't want to fetch more bytes, make sure you handle a fault.Gabe Black
--HG-- extra : convert_revision : cfebc877b9b2ebc8927ce8267867eb40ad6d59c6
2007-04-10Include the new GenFault microop.Gabe Black
--HG-- extra : convert_revision : 6c943329525d2a01f35ad5e56ff91505d5011d7b
2007-04-10Reworked x86 a bitGabe Black
--HG-- extra : convert_revision : def1a30e54b59c718c451a631a1be6f8e787e843
2007-04-10Updated for the new instruction stubs.Gabe Black
--HG-- extra : convert_revision : c85799c9093d8e9efba0744c8768196879974b74
2007-04-10Changed some instruction names to be in all caps, and "implemented" move to ↵Gabe Black
test the stub code for instructions. --HG-- extra : convert_revision : a377daf20545dfcbb0f97d8cafbe3d68416dc4b2
2007-04-10Added stub implementations of the x86 instructions categorized like they are ↵Gabe Black
in the AMD64 manuals' instruction summary in volume 1. --HG-- extra : convert_revision : 47b1d9aa0c88f6832f14ab68df174263d0d1eda9
2007-04-10A new microop which generates a specified fault.Gabe Black
--HG-- extra : convert_revision : c5c59f82553ffae273c95ea777e21e85648a4f98
2007-04-10Added a class which lets you manipulate all the strings returned by the ↵Gabe Black
parser as a unit. --HG-- extra : convert_revision : eec4b188b44b80cee643542bbd1aaa139cbc4ef0
2007-04-10Fix up the base x86 fault object and create a fault to be generated by ↵Gabe Black
unimplemented instructions in their microcode. This is useful if certain variations of an instruction are implemented, but, for instance, it's memory based versions aren't. --HG-- extra : convert_revision : 24e69c5a6a0af2d0cf67e858a051ae6624bb300f
2007-04-10Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : 247fc298ba8ea1ea38ee2e906aa84bb5bc3f4592
2007-04-10Fixed a compile error.Gabe Black
--HG-- extra : convert_revision : 70221349a7100c89be0d03210f3b04950370583f
2007-04-09add code to whack the intel gbe model from the relase.... it's not tested ↵Ali Saidi
and it's configuration is a hack --HG-- extra : convert_revision : b65cd6d9b45a67ba64ea398cf0c0ce28f91c7e27
2007-04-09Comment out the remote gdb object for SE mode.Gabe Black
--HG-- extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
2007-04-09Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/head --HG-- extra : convert_revision : a250eed999be9b8acd6f420fdfe8f1b02905beb1
2007-04-09Fix bug when blocking due to no free registers.Kevin Lim
--HG-- extra : convert_revision : a1a218d3294515184689041487057495223360b7
2007-04-09Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
2007-04-09Added SPARC o3 insttest regression.Gabe Black
--HG-- extra : convert_revision : b008b4bda60ced329df9b700ff9b0a978e2d3b19
2007-04-09Added SPARC simple timing regression for insttestGabe Black
--HG-- extra : convert_revision : cb490fd6f1be73b57dceb93edf83d7edc4a67beb
2007-04-09Make SPARC build o3 by default.Gabe Black
--HG-- extra : convert_revision : 7be49f9d395094d849d8da59b0fd4efe962fb201
2007-04-09Accidentally didn't save when moving the specialization code out of here.Gabe Black
--HG-- extra : convert_revision : 1ffe0c497e10fef1eb84b3c97c00b98d820fbb97
2007-04-08Take into account that the flattened integer register space is a different ↵Gabe Black
size than the architected one. Also fixed some asserts. --HG-- extra : convert_revision : 26e7863919d1b976ba8cad747af475a6f18e9440
2007-04-08Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : dba3542ab73cc8ae46347a14ae4c133f1276011c
2007-04-08Get the "hard" SPARC instructions working in o3. I don't like that the ↵Gabe Black
IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly. --HG-- extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
2007-04-06Move the instruction specialization stuff out of the microassembler file, ↵Gabe Black
and added some comments to main.isa --HG-- extra : convert_revision : 1534ae7d5a9e95bf662d79a04f9286c227541c6c
2007-04-06Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 8e624bb95cb9f478ca7ac1dbbd64e20674e3e224
2007-04-06Consolidated the microcode assembler to help separate it from more ↵Gabe Black
x86-centric stuff. --HG-- extra : convert_revision : 5e7e8026e24ce44a3dac4a358e0c3e5560685958
2007-04-06Refactored the x86 isa description some more. There should be more ↵Gabe Black
seperation between x86 specific parts, and those parts which are implemented in the isa description but could eventually be moved elsewhere. --HG-- rename : src/arch/x86/isa/formats/macroop.isa => src/arch/x86/isa/macroop.isa extra : convert_revision : 5ab40eedf574fce438d9fe90e00a496dc95c8bcf
2007-04-06Clean up the code a little, fix (I think) a perceived problem with immediate ↵Gabe Black
sizes, and sign extend the 32-bit-acting-like-64-bit-immediates. --HG-- extra : convert_revision : e59b747198cc79d50045bd2dc45b2e2b97bbffcc
2007-04-06Add in a stub merging functionGabe Black
--HG-- extra : convert_revision : 15e3cdb4ebcd31bc44204687ba59dde00c56c6be
2007-04-06Clean up the macroop code.Gabe Black
--HG-- extra : convert_revision : 3cf83c3e038fece6190dbb91f56deb0498c9a70d
2007-04-06Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-o3-spec --HG-- extra : convert_revision : b7e89d32df946ea24c438292308f5fc8248f8bd9
2007-04-05Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : efdbf9787383dc1df544b7276f8120285e69bf69
2007-04-04The process of going from an instruction definition to an instruction to be ↵Gabe Black
returned by the decoder has been fleshed out more. The following steps describe how an instruction implementation becomes a StaticInst. 1. Microops are created. These are StaticInsts use templates to provide a basic form of polymorphism without having to make the microassembler smarter. 2. An instruction class is created which has a "templated" microcode program as it's docstring. The template parameters are refernced with ^ following by a number. 3. An instruction in the decoder references an instruction template using it's mnemonic. The parameters to it's format end up replacing the placeholders. These parameters describe a source for an operand which could be memory, a register, or an immediate. It it's a register, the register index is used. If it's memory, eventually a load/store will be pre/postpended to the instruction template and it's destination register will be used in place of the ^. If it's an immediate, the immediate is used. Some operand types, specifically those that come from the ModRM byte, need to be decoded further into memory vs. register versions. This is accomplished by making the decode_block text for these instructions another case statement based off ModRM. 4. Once all of the template parameters have been handled, the instruction goes throw the microcode assembler which resolves labels and creates a list of python op objects. If an operand is a register, it uses a % prefix, an immediate uses $, and a label uses @. If the operand is just letters, numbers, and underscores, it can appear immediately after the prefix. If it's not, it can be encolsed in non nested {}s. 5. If there is a single "op" object (which corresponds to a single microop) the decoder is set up to return it directly. If not, a macroop wrapper is created around it. In the future, I'm considering seperating the operand type specialization from the template substitution step. A problem this introduces is that either the template arguments need to be kept around for the specialization step, or they need to be re-extracted. Re-extraction might be the way to go so that the operand formats can be coded directly into the micro assembler template without having to pass them in as parameters. I don't know if that's actually useful, though. src/arch/x86/isa/decoder/one_byte_opcodes.isa: src/arch/x86/isa/microasm.isa: src/arch/x86/isa/microops/microops.isa: src/arch/x86/isa/operands.isa: src/arch/x86/isa/microops/base.isa: Implemented polymorphic microops and changed around the microcode assembler syntax. --HG-- extra : convert_revision : e341f7b8ea9350a31e586a3d33250137e5954f43
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-14 19:45:54 +0000