gem5 - gem5

Age	Commit message (Collapse)	Author
2010-06-02	ARM: Explicitly keep track of the second destination for double loads/stores.	Gabe Black

2010-06-02	ARM: Decode the thumb32 load byte/memory hint instructions.	Gabe Black

2010-06-02	ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb.	Gabe Black

2010-06-02	ARM: Ignore/warn on accesses to icimvau.	Gabe Black

2010-06-02	ARM: Ignore/warn on iciallu.	Gabe Black

2010-06-02	ARM: Ignore/warn on ICIALLUIS.	Gabe Black

2010-06-02	ARM: Add support for the clidr register.	Gabe Black
	This register will always report 0 caches as implemented. It's not clear how to find out how many there really are when dealing with an arbitrary hierarchy.
2010-06-02	ARM: Decode the unimplemented data barrier CP15 accesses.	Gabe Black
	These are CP15DSB (Data Synchronization Barrier), and CP15DMB (Data Memory Barrier).
2010-06-02	ARM: Implement a stub of CPACR.	Gabe Black
	This register controls access to the coprocessors. This doesn't actually implement it, it allows writes which don't turn anything off. In other words, it allows the simulated program to ask for what it already has.
2010-06-02	ARM: Actually write the value of sctlr in ISA.clear().	Gabe Black

2010-06-02	ARM: Replace the ARM decode of CP15 MCR and MRC instructions.	Gabe Black

2010-06-02	ARM: Decode the unimplemented cp15 instruction barrier.	Gabe Black

2010-06-02	ARM: Ignore accesses to DCCIMVAC.	Gabe Black

2010-06-02	ARM: Allow accesses to the software thread id registers.	Gabe Black

2010-06-02	ARM: Allow accesses to the contextidr register.	Gabe Black

2010-06-02	ARM: Warn about and ignore accesses to DCCISW.	Gabe Black
	This register is supposed to "Clean and invalidate data or unified cache line by set/way." Since there isn't a good way to do that, we'll just ignore these and warn about it.
2010-06-02	ARM: Decode the thumb versions of the mcr and mrc instructions.	Gabe Black

2010-06-02	ARM: Implement the mrc and mcr instructions.	Gabe Black

2010-06-02	ARM: Rename the RevOp base class to something more generic.	Gabe Black

2010-06-02	ARM: Add a version of the Dest and Op1 operands for accessing the MiscRegs.	Gabe Black

2010-06-02	ARM: Implement a function to decode CP15 registers to MiscReg indices.	Gabe Black

2010-06-02	ARM: Decode the bfi and bfc instructions.	Gabe Black

2010-06-02	ARM: Implement the bfc and bfi instructions.	Gabe Black

2010-06-02	ARM: Decode the ubfx and sbfx instructions.	Gabe Black

2010-06-02	ARM: Decode miscellaneous arm mode media instructions.	Gabe Black

2010-06-02	ARM: Implement the ubfx and sbfx instructions.	Gabe Black

2010-06-02	ARM: Add a register, immediate, immediate to register base for [su]bfx.	Gabe Black

2010-06-02	ARM: Decode the clz instruction.	Gabe Black

2010-06-02	ARM: Implement the clz instruction.	Gabe Black

2010-06-02	ARM: Decode the rbit instruction.	Gabe Black

2010-06-02	ARM: Implement the rbit instruction.	Gabe Black

2010-06-02	ARM: Decode the nop instruction.	Gabe Black

2010-06-02	ARM: Implement nop.	Gabe Black

2010-06-02	ARM: Decode the ldrex instruction.	Gabe Black

2010-06-02	ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.	Gabe Black

2010-06-02	ARM: Implement the ldrex instruction.	Gabe Black

2010-06-02	ARM: Decode the usad8 and usada8 instructions.	Gabe Black

2010-06-02	ARM: Implement the usad8 and usada8 instructions.	Gabe Black

2010-06-02	ARM: Add a base class to support usada8.	Gabe Black

2010-06-02	ARM: Decode the sel instruction.	Gabe Black

2010-06-02	ARM: Implement the sel instruction.	Gabe Black

2010-06-02	ARM: Add a base class for the sel instruction.	Gabe Black

2010-06-02	ARM: Decode pkh instructions.	Gabe Black

2010-06-02	ARM: Implement the pkh instruction.	Gabe Black

2010-06-02	ARM: Decode the sign/zero extend instructions.	Gabe Black

2010-06-02	ARM: Implement zero/sign extend instructions.	Gabe Black

2010-06-02	ARM: Add a base class for extend and add instructions.	Gabe Black

2010-06-02	ARM: Generalize the saturation instruction bases for use in other instructions.	Gabe Black

2010-06-02	ARM: Decode the 8/16 bit signed/unsigned add/subtract half instructions.	Gabe Black

2010-06-02	ARM: Implement the 8/16 bit signed/unsigned add/subtract half instructions.	Gabe Black