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2012-09-12Ruby: Modify Scons so that we can put .sm files in extrasJason Power
Also allows for header files which are required in slicc generated code to be in a directory other than src/mem/ruby/slicc_interface.
2012-09-12stats: remove duplicate instruction stats from the commit stageAnthony Gutierrez
these stats are duplicates of insts/opsCommitted, cause confusion, and are poorly named.
2012-09-11se.py: removes error in passing options to a binaryNilay Vaish
2012-09-11clang: Fix issues identified by the clang static analyzerAndreas Hansson
This patch addresses a few minor issues reported by the clang static analyzer. The analysis was run with: scan-build -disable-checker deadcode \ -enable-checker experimental.core \ -disable-checker experimental.core.CastToStruct \ -enable-checker experimental.cpluscplus
2012-09-11Checkpoint: Pass maxtick to avoid undefined variableAndreas Hansson
This patch fixes a bug in scriptCheckpoints, where maxtick was used undefined. The bug caused checkpointing by means of --take-checkpoints to fail.
2012-09-11Cache: Split invalidateBlk up to seperate block vs. tagsLena Olson
This seperates the functionality to clear the state in a block into blk.hh and the functionality to udpate the tag information into the tags. This gets rid of the case where calling invalidateBlk on an already-invalid block does something different than calling it on a valid block, which was confusing.
2012-09-11x86 Regressions: Update stats due to register predicationNilay Vaish
2012-09-11X86: make use of register predicationNilay Vaish
The patch introduces two predicates for condition code registers -- one tests if a register needs to be read, the other tests whether a register needs to be written to. These predicates are evaluated twice -- during construction of the microop and during its execution. Register reads and writes are elided depending on how the predicates evaluate.
2012-09-11x86: Add a separate register for D flag bitNilay Vaish
The D flag bit is part of the cc flag bit register currently. But since it is not being used any where in the implementation, it creates an unnecessary dependency. Hence, it is being moved to a separate register.
2012-06-03ISA Parser: Allow predication of source and destination registersNilay Vaish
This patch is meant for allowing predicated reads and writes. Note that this predication is different from the ISA provided predication. They way we currently provide the ISA description for X86, we read/write registers that do not need to be actually read/written. This is likely to be true for other ISAs as well. This patch allows for read and write predicates to be associated with operands. It allows for the register indices for source and destination registers to be decided at the time when the microop is constructed. The run time indicies come in to play only when the at least one of the predicates has been provided. This patch will not affect any of the ISAs that do not provide these predicates. Also the patch assumes that the order in which operands appear in any function of the microop is same across all the functions of the microops. A subsequent patch will enable predication for the x86 ISA.
2012-09-11Ruby: Use uint32_t instead of uint32 everywhereNilay Vaish
2012-09-11Ruby: Use uint8_t instead of uint8 everywhereNilay Vaish
2012-09-10Regression: Updates due to changes to Ruby memory controllerNilay Vaish
2012-09-10Ruby System: Convert to Clocked ObjectNilay Vaish
This patch moves Ruby System from being a SimObject to recently introduced ClockedObject.
2012-09-10Ruby Slicc: remove the call to cin.get() functionNilay Vaish
If I understand correctly, this was put in place so that a debugger can be attached when the protocol aborts. While this sounds useful, it is a problem when the simulation is not being actively monitored. I think it is better to remove this.
2012-09-10Ruby: Bump the stats after recent memory controller changesAndreas Hansson
This patch simply bumps the stats to avoid having failing regressions. Someone with more insight in the changes should verify that these differences all make sense.
2012-09-10Mem: Allow serializing of more than INT_MAX bytesMarco Elver
Despite gzwrite taking an unsigned for length, it returns an int for bytes written; gzwrite fails if (int)len < 0. Because of this, call gzwrite with len no larger than INT_MAX: write in blocks of INT_MAX if data to be written is larger than INT_MAX.
2012-09-10NetBSD: Build on NetBSDPalle Lyckegaard
Minor patch against so building on NetBSD is possible.
2012-09-10AddrRange: Remove the unused range_ops headerAndreas Hansson
This patch prunes the range_ops header that is no longer used. The bridge used it to do filtering of address ranges, but this is changed since quite some time. Ultimately this patch aims to simplify the handling of ranges before specialising the AddrRange to an AddrRegion that also allows striping bits to be selected.
2012-09-10Inet: Remove the SackRange and its useAndreas Hansson
This patch aims to simplify the use of the Range class before introducing a more elaborate AddrRegion to replace the AddrRange. The SackRange is the only use of the range class besides address ranges, and the removal of this use makes for an easier modification of the range class. The functionlity that is removed with this patch is not used anywhere throughout the code base.
2012-09-10Device: Update stats for PIO and PCI latency changeAndreas Hansson
This patch merely updates the regression stats to reflect the change in PIO and PCI latency.
2012-09-10Device: Bump PIO and PCI latencies to more reasonable valuesAndreas Hansson
This patch addresses a previously highlighted issue with the default latencies used for PIO and PCI devices. The values are merely educated guesses and might not represent the particular system you want to model. However, the values in this patch are definitely far more realistic than the previous ones. In i8254xGBe, the writeConfig method is updated to use configDelay instead of pioDelay. A follow-up patch will update the regression stats.
2012-09-09se.py: support specifying multiple programs via command lineNilay Vaish
This patch allows for specifying multiple programs via command line. It also adds an option for specifying whether to use of SMT. But SMT does not work for the o3 cpu as of now.
2012-09-07sim: Update the SimObject documentationAndreas Sandberg
Includes a small change in sim_object.cc that adds the name space to the output stream parameter in serializeAll. Leaving out the name space unfortunately confuses Doxygen.
2012-09-07sim: Remove the unused SimObject::regFormulas methodAndreas Sandberg
Simulation objects normally register derived statistics, presumably what regFormulas originally was meant for, in regStats(). This patch removes regRegformulas since there is no need to have a separate method call to register formulas.
2012-09-07O3: Get rid of incorrect assert in RAS.Ali Saidi
2012-09-07dev: Fix bifield definition in timer_cpulocal.hhAli Saidi
Bitfield definition in the local timer model for ARM had the bitfield range numbers reversed which could lead to buggy behavior.
2012-09-07ARM: Fix the compiler and platform identification for building on ARM.Ali Saidi
2012-09-07ARM: fix m5 op binary to properly convert 64bit operandsAli Saidi
2012-09-07ARM: Fix issue with with way MPIDR is read to include affinity levels.Matt Evans
The simple_bootloader checks for CPU0 in a manner incompatible with systems actually using affinity levels -- just looking at MPIDR[7:0]. However, in future we may wish to use real affinity levels and this method will be in danger of matching several CPUs with affinity0 = 0. Match affinity2 == affinity1 == affinity0 == 0 instead.
2012-09-07Igbe: Newer kernels seem to allow TSO headers and packet data to be in one descAli Saidi
Implement some code we used to panic on as it actually does happen with the e1000 driver in Linux 3.3+. We used to assume that a TSO header would never be part of a larger payload, however it appears as though it now can be.
2012-09-07CPU: O3-PipeView.py doesn't display the end of timelines.Djordje Kovacevic
Insts' timeline that stretches over multiple lines doesn't always get printed.
2012-09-07sim: add validation to make sure there is memory where we're loading the kernelKrishnendra Nathella
2012-09-07loader: initialize all memory in the ObjectFile objects.Ali Saidi
Some bare metal build flows seem to build binaries that we aren't necessarily expecting. Initialize everything to 0, so we don't make any assumptions about what is or isn't in the binary.
2012-09-07ARM: Fix one of the timers used in the VExpress EMM platform.Ali Saidi
2012-09-07Param: Transition to Cycles for relevant parametersAndreas Hansson
This patch is a first step to using Cycles as a parameter type. The main affected modules are the CPUs and the Ruby caches. There are definitely plenty more places that are affected, but this patch serves as a starting point to making the transition. An important part of this patch is to actually enable parameters to be specified as Param.Cycles which involves some changes to params.py.
2012-09-05stats: Update Ruby regressions for memory controller fixJoel Hestness
2012-09-05Ruby Memory Controller: Fix clockingJoel Hestness
2012-08-28Ruby: Correct DataBlock =operatorJason Power
The =operator for the DataBlock class was incorrectly interpreting the class member m_alloc. This variable stands for whether the assigned memory for the data block needs to be freed or not by the class itself. It seems that the =operator interpreted the variable as whether the memory is assigned to the data block. This wrong interpretation was causing values not to propagate to RubySystem::m_mem_vec_ptr. This caused major issues with restoring from checkpoints when using a protocol which verified that the cache data was consistent with the backing store (i.e. MOESI-hammer).
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
This patch addresses the comments and feedback on the preceding patch that reworks the clocks and now more clearly shows where cycles (relative cycle counts) are used to express time. Instead of bumping the existing patch I chose to make this a separate patch, merely to try and focus the discussion around a smaller set of changes. The two patches will be pushed together though. This changes done as part of this patch are mostly following directly from the introduction of the wrapper class, and change enough code to make things compile and run again. There are definitely more places where int/uint/Tick is still used to represent cycles, and it will take some time to chase them all down. Similarly, a lot of parameters should be changed from Param.Tick and Param.Unsigned to Param.Cycles. In addition, the use of curTick is questionable as there should not be an absolute cycle. Potential solutions can be built on top of this patch. There is a similar situation in the o3 CPU where lastRunningCycle is currently counting in Cycles, and is still an absolute time. More discussion to be had in other words. An additional change that would be appropriate in the future is to perform a similar wrapping of Tick and probably also introduce a Ticks class along with suitable operators for all these classes.
2012-08-28Clock: Rework clocks to avoid tick-to-cycle transformationsAndreas Hansson
This patch introduces the notion of a clock update function that aims to avoid costly divisions when turning the current tick into a cycle. Each clocked object advances a private (hidden) cycle member and a tick member and uses these to implement functions for getting the tick of the next cycle, or the tick of a cycle some time in the future. In the different modules using the clocks, changes are made to avoid counting in ticks only to later translate to cycles. There are a few oddities in how the O3 and inorder CPU count idle cycles, as seen by a few locations where a cycle is subtracted in the calculation. This is done such that the regression does not change any stats, but should be revisited in a future patch. Another, much needed, change that is not done as part of this patch is to introduce a new typedef uint64_t Cycle to be able to at least hint at the unit of the variables counting Ticks vs Cycles. This will be done as a follow-up patch. As an additional follow up, the thread context still uses ticks for the book keeping of last activate and last suspend and this should probably also be changed into cycles as well.
2012-08-28Port: Stricter port bind/unbind semanticsAndreas Hansson
This patch tightens up the semantics around port binding and checks that the ports that are being bound are currently not connected, and similarly connected before unbind is called. The patch consequently also changes the order of the unbind and bind for the switching of CPUs to ensure that the rules are adhered to. Previously the ports would be "over-written" without any check. There are no changes in behaviour due to this patch, and the only place where the unbind functionality is used is in the CPU.
2012-08-28Checker: Bump the realview-o3-checker regressionAndreas Hansson
This patch bumps the stats for the realview-o3-checker after fixing the checker CPU in the previous patch.
2012-08-28Checker: Fix checker CPU portsAndreas Hansson
This patch updates how the checker CPU handles the ports such that the regressions will once again run without causing a panic. A minor amount of tidying up was also done as part of this patch.
2012-08-28swig: Disable unused value warning with llvm 3.1 compilersAndreas Hansson
This patch disables a warning for unused values which causes problems when compiling the swig-generated sources using recent llvm-based compilers like llvm-gcc and clang.
2012-08-27sim: fix overflow check in simulate because Tick is now unsignedAnthony Gutierrez
2012-08-27Ruby: remove README.debugging and Decommissioning_noteNilay Vaish
These files were relevant when Ruby was part of GEMS. They are not required any longer.
2012-08-27System: Remove redundant call to startupCPUNilay Vaish
2012-08-27Ruby: Remove RubyEventQueueNilay Vaish
This patch removes RubyEventQueue. Consumer objects now rely on RubySystem or themselves for scheduling events.
2012-08-27Ruby Memory Vector: Allow more than 4GB of memoryNilay Vaish
The memory size variable was a 32-bit int. This meant that the size of the memory was limited to 4GB. This patch changes the type of the variable to 64-bit to support larger memory sizes. Thanks to Raghuraman Balasubramanian for bringing this to notice.