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AgeCommit message (Expand)Author
2014-05-09stats: Method stats sourceStephan Diestelhorst
2014-05-09cpu, arm: Allow the specification of a socket fieldAkash Bagdia
2014-05-09mem: Auto-generate CommMonitor trace file namesSascha Bischoff
2014-05-09arm: Panics in miscreg read functions can be tripped by O3 modelGeoffrey Blake
2014-05-09dev: Set HDLCD default pixel clock for 1080p @ 60HzChris Emmons
2014-05-09arm: quick hack to allow a greater number of CPUs to a guest OSMatt Evans
2014-05-09arm: Add Makefile for aarch64 build of util/m5Eric Van Hensbergen
2014-05-09arch: remove inline specifiers on all inst constrs, all ISAsCurtis Dunham
2014-05-09arm: cleanup ARM ISA definitionCurtis Dunham
2014-03-19ext: disable PLY debuggingCurtis Dunham
2014-05-09scons: Require SWIG >= 2.0.4 and remove vector typemapsCurtis Dunham
2014-04-23arm: Correctly display disassembly of vldmia/vstmiaCurtis Dunham
2014-04-23util: Valgrind suppression additionMitch Hayenga
2014-04-23sim: Use correct unit for abort messageAndreas Hansson
2014-04-23cpu: Fix setTranslateLatency() bug for squashed instructionsMitchell Hayenga
2014-04-23misc: Proper type check and import for PortRefSascha Bischoff
2014-04-01cpu: Fix case where o3 lsq could print out uninitialized dataMitch Hayenga
2014-04-01mem: Don't print out the data of a cache blockMitch Hayenga
2014-04-23arm: Don't use a stack allocated mnemonicMitchell Hayenga
2014-04-23cpu: Add O3 CPU width checksDam Sunwoo
2014-04-23base: explicitly suggest potential use of 'All' debug flagsCurtis Dunham
2014-04-23arch: remove 'null update' check in isa-parserCurtis Dunham
2014-02-10stats: better error message for uninitialized statisticCurtis Dunham
2014-04-22stats: updates for pc-switcheroo-full due to o3 smt fixAndreas Hansson
2014-04-19stats: updates due to o3 smt fixNilay Vaish
2014-04-19ruby: slicc: remove old documentationNilay Vaish
2014-04-19ruby: slicc: slight change to rule for transitionsNilay Vaish
2014-04-19o3: Fix occupancy checks for SMTFaissal Sleiman
2014-04-19ruby: recorder: Fix (de-)serializing with different cache block-sizesMarco Elver
2014-04-19config: ruby: remove memory controller from network testNilay Vaish
2014-04-14arm: set default kernels for VExpress_EMM and VExpress_EMM64Anthony Gutierrez
2014-04-13scons: Fix python-config parsing by adding strip()Andreas Hansson
2014-04-10config: add num-work-ids command line optionGedare Bloom
2014-04-10scons: compile on systems where python2 and python3 co-existStian Hvatum
2014-04-09kvm, x86: Add initial support for multicore simulationAndreas Sandberg
2014-04-09dev: Protect PollEvent processing when running in parallel modeAndreas Sandberg
2014-04-08ruby: slicc: change enqueue statementNilay Vaish
2014-04-08ruby: coherence protocols: drop the phrase IntraChipNilay Vaish
2014-04-03sim: Add the ability to lock and migrate between event queuesAndreas Sandberg
2014-04-01ext: add McPAT sourceAnthony Gutierrez
2014-04-01arm: fix typos in makefile for ARM m5 util and link staticallyAnthony Gutierrez
2014-04-01configs: use SimpleMemory when using ruby in se modeNilay Vaish
2014-03-25cpu: o3: lsq: Fix TSO implementationMarco Elver
2014-03-23stats: Update stats for DRAM changesAndreas Hansson
2014-03-23mem: Track DRAM read/write switching and add hysteresisAndreas Hansson
2014-03-23mem: Rename SimpleDRAM to a more suitable DRAMCtrlAndreas Hansson
2014-03-23mem: Change memory defaults to be more representativeAndreas Hansson
2014-03-23mem: Add close adaptive paging policy to DRAM controller modelWendy Elsasser
2014-03-23mem: DRAM controller tidying upAndreas Hansson
2014-03-23mem: Fix bug in DRAM bytes per activateAndreas Hansson
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