gem5 - gem5

Age	Commit message (Expand)	Author
2006-10-27	Made the regfile compatible with the new definitions in MiscRegFile	Gabe Black
2006-10-27	Clean up MiscRegFile	Gabe Black
2006-10-26	Reorganized the MiscRegFile	Gabe Black
2006-10-26	Cleaned up the decoder slightly.	Gabe Black
2006-10-26	Added a few functions to stuff values into bitfields in an instruction.	Gabe Black
2006-10-26	Changed the number of register windows to be more realistic.	Gabe Black
2006-10-26	Got rid of some debug output	Gabe Black
2006-10-26	Change the default function from setMiscRegWithEffect to setMiscReg	Gabe Black
2006-10-25	Fixed the priv instruction format.	Gabe Black
2006-10-25	Implemented the saved and restored instructions, fixed up register window ins...	Gabe Black
2006-10-25	Fixed the bitfield FCN to include the right bits.	Gabe Black
2006-10-25	Implemented the SPARC fill and spill handlers.	Gabe Black
2006-10-24	Replace the Alpha No op with a SPARC one.	Gabe Black
2006-10-23	Minor compile fix. Not sure why this is broken.	Gabe Black
2006-10-23	Move around more SPARC memory code, and make block memory operations work wit...	Gabe Black
2006-10-23	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2006-10-23	Add reference outputs for SPARC on the atomic timing cpu model	Gabe Black
2006-10-23	Broke Load/Store instructions into microcode, and partially refactored memory...	Gabe Black
2006-10-23	Don't let interupts interupt microcode at undesired points.	Gabe Black
2006-10-23	Files in base shouldn't depend on things in sim. Changed "sim/host.hh" to <in...	Gabe Black
2006-10-23	Start making memory ops work with InitiateAcc and CompleteAcc, and some minor...	Gabe Black
2006-10-23	Change the default constructors to take ExtMachInsts rather than regular Mach...	Gabe Black
2006-10-22	Add mutex test to Benchmarks.py.	Steve Reinhardt
2006-10-22	Another missing case in a switch (like Nate's earlier fix).	Steve Reinhardt
2006-10-22	Have tracediff print warning if no traceflags are set.	Steve Reinhardt
2006-10-21	Small bug fixes for timing LL/SC. Better now but	Steve Reinhardt
2006-10-21	Add Quiesce trace flag to track CPU quiesce/wakeup events.	Steve Reinhardt
2006-10-21	Just give up if a store conditional misses completely	Steve Reinhardt
2006-10-21	Fix formatting that got screwed up when tabs were removed.	Steve Reinhardt
2006-10-21	Refactor coherence state table initialization.	Steve Reinhardt
2006-10-21	Merge vm1.(none):/home/stever/bk/newmem-head	Steve Reinhardt
2006-10-21	Get rid of unused handleTargets() function.	Steve Reinhardt
2006-10-21	Tweak a few things for better page fault debugging.	Steve Reinhardt
2006-10-21	Updated to work with new command line argument ordering.	Steve Reinhardt
2006-10-21	Merge zizzer.eecs.umich.edu:/bk/newmem	Nathan Binkert
2006-10-21	Missing case	Nathan Binkert
2006-10-20	Add some default options, point it to the /dist version of the splash benchmarks	Ron Dreslinski
2006-10-20	Merge zizzer:/bk/newmem	Ron Dreslinski
2006-10-20	Clean up splash2 so it works in v2.0	Ron Dreslinski
2006-10-20	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2006-10-20	Construct a correct value of PYTHONHOME from the interpreter	Nathan Binkert
2006-10-20	Give physical memory some latency to stress the system	Ron Dreslinski
2006-10-20	Add a config file in the example with the memtester and some parser options.	Ron Dreslinski
2006-10-20	Get rid of a variable put back by merge.	Ron Dreslinski
2006-10-20	Merge zizzer:/bk/newmem	Ron Dreslinski
2006-10-20	Use fixPacket function everywhere.	Ron Dreslinski
2006-10-20	Use PacketPtr everywhere	Nathan Binkert
2006-10-19	refactor code for the packet, get rid of packet_impl.hh	Nathan Binkert
2006-10-19	initialize end, clean up loop	Nathan Binkert
2006-10-19	Fix compile of m5.fast	Nathan Binkert