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AgeCommit message (Expand)Author
2014-11-12base: Revert 9277177eccff and use getenv/setenv for UTC timeAndreas Hansson
2014-11-11stats: changes to x86 o3 fs and sparc fs regression tests.Nilay Vaish
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr
2014-11-06tests: A test program for the new mwait implementation.Marc Orr
2014-11-06cpu: Minor Draining BugAndrew Lukefahr
2014-11-06stats: updates due to changes to rubyNilay Vaish
2014-11-06ruby: provide a backing storeNilay Vaish
2014-11-06ruby: interface with classic memory controllerNilay Vaish
2014-11-06ruby: remove the function functionalReadBuffers()Nilay Vaish
2014-11-06ruby: coherence protocols: remove data block from dirctory entryNilay Vaish
2014-11-06ruby: slicc: allow adding a bool to an int, like C++.Nilay Vaish
2014-11-06ruby: remove sparse memory.Nilay Vaish
2014-11-06ruby: single physical memory in fs modeNilay Vaish
2014-11-06ruby: dma sequencer: remove RubyPort as parent classNilay Vaish
2014-11-03tests: Update stats no match.Ali Saidi
2014-10-30arm, tests: Forgot the system.terminal files for the new regressions.Ali Saidi
2014-10-29arm, tests: Add 64-bit ARM regression testsAli Saidi
2014-10-29automated mergeAli Saidi
2014-10-29tests: Update regressions for the new kernels and various preceeding fixes.Ali Saidi
2014-10-29arm, tests: Update config files to more recent kernels and create 64-bit regr...Ali Saidi
2014-10-29cpu: Add writeback modeling for drain functionalityMitch Hayenga
2014-10-29cpu: Add drain check functionality to IEWMitch Hayenga
2014-10-29arm, mem: Fix drain bug and provide drain prints for more components.Ali Saidi
2014-10-29arm: Fix multi-system AArch64 boot w/caches.Ali Saidi
2014-10-29arm: fix bare-metal memory setup.Ali Saidi
2014-10-29arm: Mark some miscregs (timer counter) registers at unverifiable.Ali Saidi
2014-10-29cpu: Add support to checker for CACHE_BLOCK_ZERO commands.Ali Saidi
2014-10-29cpu: Fix barrier push to store buffer when full bug in MinorAndrew Bardsley
2014-10-21mem: don't inhibit WriteInv's or defer snoops on their MSHRsCurtis Dunham
2014-10-29mem: have WriteInvalidate obsolete MSHRsCurtis Dunham
2014-09-02syscall_emul: add retry flag to SyscallReturnSteve Reinhardt
2014-10-22syscall_emul: minor style fix to LiveProcess constructorSteve Reinhardt
2014-10-22syscall_emul: devirtualize BaseBufferArg methodsSteve Reinhardt
2014-10-22syscall_emul: Put BufferArg classes in a separate header.Steve Reinhardt
2014-10-22syscall_emul: add EmulatedDriver objectSteve Reinhardt
2014-10-22sim: revert 6709bbcf564dNilay Vaish
2014-10-20x86: Fixes to avoid LTO warningsAndreas Hansson
2014-10-20misc: Use gmtime for conversion to UTC to avoid getenv/setenvAndreas Hansson
2014-10-20mem: Fix DRAM activationlLimit bugOmar Naji
2014-10-20base: Fix for stats node on gcc < 4.6.3Andreas Hansson
2014-10-20ext: Bump DRAMPower to avoid compilation issuesAndreas Hansson
2014-10-20mem: Add DRAM device size and check against configOmar Naji
2014-10-20stats: updates due to previous mmap and exit_group patches.Nilay Vaish
2014-10-20cpu: o3: corrects base FP and CC register index in removeThread()Nilay Vaish
2014-10-20sim: invalid alignment checks in mmap and mremapTom Jablin
2014-10-20sim: mmap: correct behavior for fixed addressMichael Adler
2014-10-20sim: implement getdents/getdents64 in user modeMichael Adler
2014-10-20x86: syscall: implementation of exit_groupSeverin Wischmann ext:(%2C%20Ioannis%20Ilkos%20%3Cioannis.ilkos09%40imperial.ac.uk%3E)
2014-10-16mem: Modernise PhysicalMemory with C++11 featuresAndreas Hansson
2014-10-16misc: Move AddrRangeList from port.hh to addr_range.hhAndreas Hansson