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2011-03-19RubyPort: minor fixes to trace flag and dprintfsBrad Beckmann
2011-03-19ruby: added useful dma progress dprintfBrad Beckmann
2011-03-19slicc: improved invalid transition messageBrad Beckmann
2011-03-19MOESI_hammer: fixed dma bug with shared dataBrad Beckmann
2011-03-19MOESI_CMP_directory: significant dma bug fixesBrad Beckmann
2011-03-18SLICC: Remove external_type for structuresNilay Vaish
In SLICC, in order to define a type a data type for which it should not generate any code, the keyword external_type is used. For those data types for which code should be generated, the keyword structure is used. This patch eliminates the use of keyword external_type for defining structures. structure key word can now have an optional attribute external, which would be used for figuring out whether or not to generate the code for this structure. Also, now structures can have functions as well data members in them.
2011-03-18SLICC: Remove the keyword wake_up_dependentsNilay Vaish
In order to add stall and wait facility for protocols, a keyword wake_up_dependents was introduced. This patch removes the keyword, instead this functionality is now implemented as function call.
2011-03-18SLICC: Remove the keyword wake_up_all_dependentsNilay Vaish
In order to add stall and wait facility for protocols, a keyword wake_up_all_dependents was introduced. This patch removes the keyword, instead this functionality is now implemented as function call.
2011-03-18swig: get rid of m5.internal.random module (swig/random.i)Steve Reinhardt
Thanks to swig this was interfering with the standard Python random module. The only function in that module was seed(), which erroneously called srand48(). Moved the function to m5.internal.core, renamed it seedRandom(), and made it call random_mt.init() instead.
2011-03-18base: disable FastAlloc in debug builds by defaultSteve Reinhardt
FastAlloc's reuse policies can mask allocation bugs, so we typically want it disabled when debugging. Set FORCE_FAST_ALLOC to enable even when debugging, and set NO_FAST_ALLOC to disable even in non-debug builds.
2011-03-17Automated merge with ssh://hg@repo.m5sim.org/m5Ali Saidi
2011-03-17ARM: Update stats for the previous changes and add ARM_FS/O3 regression.Ali Saidi
2011-03-17ARM: Add minimal ARM_SE support for m5threads.Chris Emmons
Updated some of the assembly code sequences to use armv7 instructions and coprocessor 15 for storing the TLS pointer.
2011-03-17ARM: Fix subtle bug in LDM.Ali Saidi
If the instruction faults mid-op the base register shouldn't be written back.
2011-03-17ARM: Implement the Instruction Set Attribute Registers (ISAR).Ali Saidi
The ISAR registers describe which features the processor supports. Transcribe the values listed in section B5.2.5 of the ARM ARM into the registers as read-only values
2011-03-17ARM: Identify branches as conditional or unconditional and direct or indirect.Ali Saidi
2011-03-17ARM: Bare metal system should have 256MB of RAM.Ali Saidi
2011-03-17ARM: Fix small bug with VLDM/VSTM instructions.Ali Saidi
2011-03-17ARM: Detect and skip udelay() functions in linux kernel.Ali Saidi
This change speeds up booting, especially in MP cases, by not executing udelay() on the core but instead skipping ahead tha amount of time that is being delayed.
2011-03-17ARM: Allow conditional quiesce instructions.Ali Saidi
This patch prevents not executed conditional instructions marked as IsQuiesce from stalling the pipeline indefinitely. If the instruction is not executed the quiesceSkip psuedoinst is called which schedules a wakes up call to the fetch stage.
2011-03-17Stats: Update the statistics for rfe patch.Ali Saidi
2011-03-17ARM: Fix RFE macrop.Matt Horsnell
This changes the RFE macroop into 3 microops: URa = [sp]; URb = [sp+4]; // load CPSR,PC values from stack sp = sp + offset; // optionally auto-increment PC = URa; CPSR = URb; // write to the PC and CPSR. Importantly: - writing to PC is handled in the last micro-op. - loading occurs prior to state changes.
2011-03-17ARM: Rename registers used as temporary state by microops.Matt Horsnell
2011-03-17O3: Send instruction back to fetch on squash to seed predecoder correctly.Ali Saidi
2011-03-17O3: Cleanup the commitInfo comm struct.Ali Saidi
Get rid of unused members and use base types rather than derrived values where possible to limit amount of state.
2011-03-17ARM: Previous change didn't end up setting instFlags, this does.Ali Saidi
2011-03-17O3: Update regressions for mem block caching change.Ali Saidi
2011-03-17Mem: Fix issue with dirty block being lost when entire block transferred to ↵Ali Saidi
non-cache. This change fixes the problem for all the cases we actively use. If you want to try more creative I/O device attachments (E.g. sharing an L2), this won't work. You would need another level of caching between the I/O device and the cache (which you actually need anyway with our current code to make sure writes propagate). This is required so that you can mark the cache in between as top level and it won't try to send ownership of a block to the I/O device. Asserts have been added that should catch any issues.
2011-03-17O3: Fix unaligned stores when cache blockedAli Saidi
Without this change the a store can be issued to the cache multiple times. If this case occurs when the l1 cache is out of mshrs (and thus blocked) the processor will never make forward progress because each cycle it will send a single request using the recently freed mshr and not completing the multipart store. This will continue forever.
2011-03-17Ruby: minor bugfix, line did not adhere to some macro usage conventions.Lisa Hsu
2011-03-17Ruby: expose a simple mod function in slicc interface.Lisa Hsu
2011-03-17X86: Update the stats for parser on x86 O3.Ali Saidi
2011-03-16X86: Update the stats for gzip on x86 O3.Gabe Black
2011-03-12Regressions: Move the X86_FS regressions to "quick" instead of "long".Gabe Black
--HG-- rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/simout => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simout rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt rename : tests/long/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal => tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal
2011-03-12Regressions: Make X86_FS run automatically.Gabe Black
2011-03-11SCons: Stop embedding the mercurial revision into the binary.Gabe Black
This causes a lot of rebuilds that could have otherwise possibly been avoided, and, more annoyingly, a lot of unnecessary rerunning of the regressions. The benefits of having the revision in the output haven't materialized, so this change removes it.
2011-03-11Gems: Eliminate the now unused GEMS_ROOT scons variable.Gabe Black
2011-03-11Ruby: Get rid of the dead ruby tester.Gabe Black
None of the code in the ruby tester directory is compiled or referred to outside of that directory. This change eliminates it. If it's needed in the future, it can be revived from the history. In the mean time, this removes clutter and the only use of the GEMS_ROOT scons variable.
2011-03-08Alpha: Fix the datatypes of some values read from the simulated kernel.Yi Xiang
2011-03-04SCons: Fix the polarity on the --ignore-style check.Gabe Black
2011-03-03SCons: Clean up some inconsistent capitalization in scons options.Gabe Black
2011-03-03SCons: Turn some scons variables into command line options.Gabe Black
2011-03-03Mips: MIPS_FS doesn't build currently, so delete it to avoid confusion.Gabe Black
MIPS_FS doesn't build and presumably doesn't work right now. Users might see the MIP_FS file in build_opts and expect it to work. To avoid confusion, this change deletes that file.
2011-03-02Statetrace: Stub out the missing i386 version of sendState.Gabe Black
2011-03-02Statetrace: Rename i386 to i686.Gabe Black
--HG-- rename : util/statetrace/arch/i386/tracechild.cc => util/statetrace/arch/i686/tracechild.cc rename : util/statetrace/arch/i386/tracechild.hh => util/statetrace/arch/i686/tracechild.hh
2011-03-02Statetrace: Fix the i686 detection macro.Gabe Black
2011-03-02Statetrace: Use sys/user.h instead of linux/user.h.Gabe Black
2011-03-02Statetrace: Tweak the help for the -nt option.Gabe Black
2011-03-02Statetrace: Accomodate cross compiling statetrace with scons.Gabe Black
--HG-- rename : util/statetrace/arch/tracechild_amd64.cc => util/statetrace/arch/amd64/tracechild.cc rename : util/statetrace/arch/tracechild_amd64.hh => util/statetrace/arch/amd64/tracechild.hh rename : util/statetrace/arch/tracechild_arm.cc => util/statetrace/arch/arm/tracechild.cc rename : util/statetrace/arch/tracechild_arm.hh => util/statetrace/arch/arm/tracechild.hh rename : util/statetrace/arch/tracechild_i386.cc => util/statetrace/arch/i386/tracechild.cc rename : util/statetrace/arch/tracechild_i386.hh => util/statetrace/arch/i386/tracechild.hh rename : util/statetrace/arch/tracechild_sparc.cc => util/statetrace/arch/sparc/tracechild.cc rename : util/statetrace/arch/tracechild_sparc.hh => util/statetrace/arch/sparc/tracechild.hh rename : util/statetrace/tracechild_arch.cc => util/statetrace/base/arch_check.h rename : util/statetrace/regstate.hh => util/statetrace/base/regstate.hh rename : util/statetrace/statetrace.cc => util/statetrace/base/statetrace.cc rename : util/statetrace/tracechild.cc => util/statetrace/base/tracechild.cc rename : util/statetrace/tracechild.hh => util/statetrace/base/tracechild.hh
2011-03-02Statetrace: Convert the build to scons.Gabe Black
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