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2016-06-20tests: Add a test command to get test status as an exit codeAndreas Sandberg
Add a "test" command to tests.py that queries a test pickle file and returns different exit codes depending on the outcome of the tests in the file. The following exit codes can currently be returned: * 0: All tests were successful or skipped. * 1: General fault in the script such as incorrect parameters or failing to parse a pickle file. * 2: At least one test failed to run. This is what the summary formatter usually shows as a 'FAILED'. * 3: All tests ran correctly, but at least one failed to verify its output. When displaying test output using the summary formatter, such a test would show up as 'CHANGED'. The command can be invoked like this: ./tests/tests.py test `find build/ARM/tests/opt/ -name status.pickle` Change-Id: I7e6bc661516f38ff08dfda7c4359a1e10bf97864 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-06-20tests: Split test results into running and verificationAndreas Sandberg
The test base class already assumes that test cases consists of a run stage and a verification stage. Reflect this in the results class to make it possible to detect cases where a run was successful, but didn't verify. Change-Id: I31ef393e496671221c5408aca41649cd8dda74ca Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-06-20style: catch trailing white spaces in make and dts filesGabor Dozsa
Change-Id: I2a4f1893919660e51599902b972a6f3f5717e305 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-20mem: Resolve TrafficGen trace relative to the configAndreas Sandberg
The traffic generator currently resolves relative trace paths relative to gem5's current working directory. This can lead to surprising results for relative paths where the expectation would normally be that they are resolved relative to the configuration file. This changeset implements config-relative trace file lookups. The old behavior is kept as a fallback for configs that expect that behavior. Change-Id: I1bda4e16725842666ffc37dcb6838c23a6ff138c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-06-20config: Fix omission of walker cache in config scriptsAndreas Hansson
This patch ensures a walker cache is instantiated if specfied. Change-Id: I2c6b4bf3454d56bb19558c73b406e1875acbd986 Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Mitch Hayenga <mitch.hayenga@arm.com>
2016-06-20kern, arm: Dump dmesg on kernel panic/oopsAndreas Sandberg
Add helper functions to dump the guest kernel's dmesg buffer to a text file in m5out. This functionality is split into two parts. First, a dmesg dump function that can be used in other places: void Linux::dumpDmesg(ThreadContext *, std::ostream &) This function is used to implement two PCEvents: DmesgDumpEvent and KernelPanic event. The only difference between the two is that the latter produces a gem5 panic instead of a warning in addition to dumping the kernel log. Change-Id: I6d2af1d666ace57124089648ea906f6c787ac63c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
2016-06-20base: Fix multiple names to one address bug in SymbolTableAndreas Sandberg
The SymbolTable class currently assumes that at most one symbol can point to a given address. If multiple symbols point to the same address, only the first one gets added to the internal symbol table since there is already a match in the address table. This changeset converts the address table from a map into a multimap to be able to handle cases where an address maps to multiple symbols. Additionally, the insert method is changed to not fail if there is a match in the address table. Change-Id: I6b4f1d5560c21e49a4af33220efb2a8302961768 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Hansson <andreas.hansson@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
2016-06-18gpu-compute: Fixed a bug in decoding Atomic STTuan Ta
There is a mismatch between DataType and SrcDataType in constructing Atomic ST instruction. The mismatch causes atomic_store and atomic_store_explicit function to store incorrect value in memory.
2016-06-12stats: update EIO statsSteve Reinhardt
2016-06-09gpu-compute: parametrize Wavefront sizejkalamat
Eliminate the VSZ constant that defined the Wavefront size (in numbers of work items); replaced it with a parameter in the GPU.py configuration script. Changed all data structures dependent on the Wavefront size to be dynamically sized. Legal values of Wavefront size are 16, 32, 64 for now and checked at initialization time.
2016-06-08dist, dev: Fixed the packet ordering in etherswitchMohammad Alian
This patch fixes the order that packets gets pushed into the output fifo of etherswitch. If two packets arrive at the same tick to the etherswitch, we sort and push them based on their source port id. In dist-gem5 simulations, if there is no ordering inforced while two packets arrive at the same tick, it can lead to non-deterministic simulations Committed by Jason Lowe-Power <power.jg@gmail.com>
2016-06-07sim: Make clang happyAndreas Hansson
Once again appeasing clang.
2016-06-07sim: added missing include to mathexpr.hhSergei Trofimov
mathexpr.hh uses std::function<> but was not including the appropriate header, which resulted in an error build/ARM/sim/mathexpr.hh:51:18: error: 'function' in namespace 'std' does not name a template type typedef std::function<double(std::string)> EvalCallback; This commit adds the missing include. Change-Id: I6c01d77d4354c6de838538f137a38f75f9866166 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-06-06stats: Add power stats to test referencesAndreas Sandberg
Change-Id: Ic827213134b199446822f128b81d4a480e777fee
2016-06-06sim: Only print the power state transition warning onceAndreas Sandberg
A lot of objects seem to request no-op power transitions which currently results in large amounts of warnings. These warnings are benign and risk hiding more serious warnings. Make the warning a warn_once to prevent console flooding. Change-Id: I86c74b4224b167f14469250ef86ab69fde7a227e Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06pwr: Closing power and thermal feedback loopDavid Guillen Fandos
This patch makes thermal models use the power figures calculated by power models. Since there is a circular dependency between power and thermal (and thermal was pushed before) this patch closes that loop. Change-Id: I8bd5acf6a5026fdbbcfac47e33d27397f24a6f7d Reviewed-by: Stephan Diestelhorst <stephan.diestelhorst@arm.com>
2016-06-06sim: Adding support for power modelsDavid Guillen Fandos
This patch adds some basic support for power models in gem5. The power interface is defined so it can interact with thermal models as well. It implements a simple power evaluator that can be used for simple power models that express power in the form of a math expression. These expressions can use stats within the same SimObject (or down its hierarchy) and some magic variables such as "temp" for temperature. In future patches we will extend this functionality to allow slightly more complex expressions. The model allows it to be extended to use other kinds of models. Change-Id: I76752f9638b6815e229fd74cdcb7721a305cbc4b
2016-06-06pwr: Low-power idle power state for idle CPUsDavid Guillen Fandos
Add functionality to the BaseCPU that will put the entire CPU into a low-power idle state whenever all threads in it are idle. Change-Id: I984d1656eb0a4863c87ceacd773d2d10de5cfd2b
2016-06-06stats: Silence unused power statsAndreas Sandberg
The power stats are currently very noisy even if no power model has been loaded. Silence stats that are either zero or nan. Change-Id: I7d0220c2fcf01131084a219228f140cfaddaf95b Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06pwr: Add power states to ClockedObjectDavid Guillen Fandos
Add 4 power states to the ClockedObject, provides necessary access functions to check and update the power state. Default power state is UNDEFINED, it is responsibility of the respective simulation model to provide the startup state and any other logic for state change. Add number of transition stat. Add distribution of time spent in clock gated state. Add power state residency stat. Add dump call back function to allow stats update of distribution and residency stats. Change-Id: Id086090a2ed720c9fcb37812a3c98f0f724907c6
2016-06-06stats: Fixing regStats function for some SimObjectsDavid Guillen Fandos
Fixing an issue with regStats not calling the parent class method for most SimObjects in Gem5. This causes issues if one adds new stats in the base class (since they are never initialized properly!). Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06sim: Call regStats of base-class as wellStephan Diestelhorst
We want to extend the stats of objects hierarchically and thus it is necessary to register the statistics of the base-class(es), as well. For now, these are empty, but generic stats will be added there. Patch originally provided by Akash Bagdia at ARM Ltd.
2016-06-06stats: update EIO statsSteve Reinhardt
2016-06-03gpu-compute: Fixed a bug in global memory pipelineTuan Ta
Added a condition when inflightStores is incremented to prevent a deadlock caused by many memory fence requests generated by a CU
2016-06-03ruby: Implement SwapReq supportMarco Elver
This implements SwapReq for Ruby memory. A SwapReq should be treated like a write, except that the response packet contains the overwritten data. Note that, in particular, the conditional checking for isStore/isLoad needs to be reversed, as a SwapReq is both.
2016-06-02stats: Update ref stats to match ARM TLB changesAndreas Sandberg
2016-06-02arm: refactor page table format determinationCurtis Dunham
In particular, when EL0 is in AArch32 but EL1 is AArch64, AArch64 memory translation must be used. This is essential for typical AArch64/32 interworking use cases.
2016-06-02tests: Remove working dir assumption in tgen testsAndreas Sandberg
The traffic generator tests currently assume that they are run from the root of the source directory. This sometimes breaks tests when they are run using the new test framework. Change-Id: I6538a7902694c5d2c980295e076ea1c09acc4291 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-06-02stats: Update to match ARM ISA changesAndreas Sandberg
2016-06-02arm: Rewrite ERET to behave according to the ARMv8 ARMAndreas Sandberg
The ERET instruction doesn't set PSTATE correctly in some cases (particularly when returning to aarch32 code). Among other things, this breaks EL0 thumb code when using a 64-bit kernel. This changeset updates the ERET implementation to match the ARM ARM. Change-Id: I408e7c69a23cce437859313dfe84e68744b07c98 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>
2016-06-02arm: Correctly check FP/SIMD access permission in aarch32Andreas Sandberg
The current implementation of aarch32 FP/SIMD in gem5 assumes that EL1 and higher are all 32-bit. This breaks interprocessing since an aarch64 EL1 uses different enable/disable bits. This change updates the permission checks to according to what is prescribed by the ARM ARM. Change-Id: Icdcef31b00644cfeebec00216b3993aa1de12b88 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Mitch Hayenga <mitch.hayenga@arm.com> Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>
2016-06-02tests: add 'CHANGED' output to pickle viewerCurtis Dunham
Change-Id: I64c69fde8657c273adea69122877c5348a4f867a Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-02tests: Only run Ruby tests when testing Ruby targetsAndreas Sandberg
Limit the test configs to Ruby-only configs when testing a Ruby target that isn't MI_example. This avoids re-running configs that has already been tested by the generic (non-Ruby) ISA target. This behavior was the expected behavior prior to switching to the new test framework. Change-Id: I3f138dbf9c7071ce862d1073aaec57c59afbc921 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-06-02style: remove extra newline from white space verifier fix methodGabor Dozsa
Change-Id: I7bce7d1cb04efe20d31445eb67ea5ffd2a4a41f4 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-02style: respect per verifier ignores for git commitGabor Dozsa
Change-Id: Id00379bdb17594e627ee49c077fb75f499ea550e Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-02style: Move the last bits of file_types.py to the style packageAndreas Sandberg
The commit that refactored the style checkers into a new Python package (style: Refactor the style checker as a Python package) accidentally left a fragment of file_types.py in the old location (util/style.py). This was caused by a race between the commit that moved the file and Nate's commit that added a copyright header to the file. This commit moves the last fragment (the copyright header) and removes the old file. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> --HG-- extra : amend_source : 946f1f6fee034ae79bd50ea7dfc3299a60f070c0
2016-05-31stats: update and fix e273e86a873dCurtis Dunham
2016-05-31arm: Enable LPAE support by defaultAndreas Sandberg
LPAE has been tested with Linux 4.4 and seems to work just fine. Let's enable it by default. Change-Id: Id88c6e3c91ae9c353279d42f2aa1f8a78485bd32 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
2016-05-31arm: Correctly check translation mode (aarch64/aarch32)Andreas Sandberg
According to the ARM ARM (see AArch32.TranslateAddress in the pseudocode library), the TLB should be operating in aarch64 mode if the EL0 is aarch32 and EL1 is aarch64. This is currently not the case in gem5, which breaks 64/32 interprocessing. Update the check to match the reference manual. Change-Id: I6f1444d57c0e2eb5f8880f513f33a9197b7cb2ce Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Mitch Hayenga <mitch.hayenga@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-05-31scons: Use the new test framework from sconsAndreas Sandberg
Rewrite the SCons script responsible for launching tests to use the new test framework. The biggest visible change after this changeset is that SCons no longer produces a "status" file in test build directories. Instead, it creates a status.pickle file. That file can be inspected using the new tests.py script. Another visible change is that timed out tests are now reported as failed rather than a using a separate summary message. Since the pickle file will remain in the build directory after running tests, it's now possible to convert the test results into other formats. For example: ./tests/tests.py show --format junit -o junit.xml \ `find build/ -name status.pickle` To better facilitate running outside of scons, there is now a set of targets that generate test listings that can be used by the test script. There are currently three targets, quick.list, long.list, and all.list. For example: scons build/ARM/tests/opt/all.list for F in `cat build/ARM/tests/opt/all.list`; do ./tests/tests.py run build/ARM/gem5.opt $F done Change-Id: I2c0f8ca0080d7af737362e198eda4cb3a72e6c36 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
2016-05-31tests: Fix incorrect stat.txt ignore when updating refsAndreas Sandberg
ClassicTest was incorrectly ignoring stats.txt when updating reference statistics. This was caused by ignore rules being applied too aggressively when listing reference files. This changeset splits the ignore rules into two different lists: 1) diff_ignore_files that lists the files that shouldn't be diff:ed using the normal diff tool, and 2) ref_ignore_files which lists files that should be ignored by the test system. Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-05-31stats: update for snoop filter tweakCurtis Dunham
--HG-- extra : source : 2323557eb4f4866fa1ea1575a9f5969e0022adc1
2016-05-27mem, config: Selective use of snoop filterStephan Diestelhorst
Disable the default snoop filter in the SystemXBar so that the typical membus does not have a snoop filter by default. Instead, add the snoop filter only when there are caches added to the system (with the caches / l2cache options). The underlying problem is that the snoop filter grows without bounds (for now) if there are no caches to tell it that lines have been evicted. This causes slow regression runs for all the atomic regressions. This patch fixes this behaviour. --HG-- extra : source : f97c20511828209757440839ed48d741d02d428f
2016-05-30scons: Bump minimum gcc version to 4.8Andreas Hansson
After reaching consensus on the mailing list, this patch officially makes gcc 4.8 the minimum. A few checks in the SConstruct are cleaned up as a result. This patch also adds "-fno-omit-frame-pointer" when using ASAN (which is part of the gcc/clang recommended flags).
2016-05-27cpu: fix lastStopped unserialisationIlias Vougioukas
MinorCPU fix for corrupt numCycles when resuming from a previous simulation. --- src/cpu/minor/cpu.cc | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
2016-05-27power: Allow voltage to be configured via cmd lineAkash Bagdia
--- src/python/m5/params.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
2016-05-27scons: Enable override suggestions on gcc 5.0+Matteo Andreozzi
--- SConstruct | 4 ++++ 1 file changed, 4 insertions(+)
2016-05-27arm: Use the target EL state when determining fault formatAndreas Sandberg
We currently check the current state instead of the state of the target EL when determining how we report a fault. This breaks interprocessing since EL0 in aarch32 would report its fault status using the aarch32 registers even if EL1 is in aarch64. Fix this to report the fault using the format of the target EL. Change-Id: Ic080267ac210783d1e01c722a4ddaa687dce280e Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Mitch Hayenga <mitch.hayenga@arm.com>
2016-05-26arm: Fix incorrect TLB permission check in aarch32Andreas Sandberg
The TLB currently assumes that the pxn bit in an LPAE page descriptor disables execution from unprivileged mode. However, according to the architecture manual, this bit should disable execution from privileged modes. Update the TLB implementation to reflect this behavior. Change-Id: I7f1bb232d7a94a93fd601a9230223195ac952947 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-05-26arm: Make EL checks available in SE modeAndreas Sandberg
A lot of code assumes that it is possible to test what the highest EL is and if it is 64 bit. These calls currently don't work in SE mode since they rely on an instance of an ArmSystem. Change-Id: I0d1f261926a66ce3dc4fa116845ffb2a081446f2 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>