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AgeCommit message (Expand)Author
2010-10-22Configs: Stop setting the "mem" parameter in splash2 config files.Gabe Black
2010-10-22X86: Make nop a regular, non-microcoded instruction.Gabe Black
2010-10-22X86: Implement genMachineCheckFault.Gabe Black
2010-10-22X86: Make syscall instructions non-speculative in SE.Gabe Black
2010-10-22ISA: Simplify various implementations of completeAcc.Gabe Black
2010-10-22ARM: Don't pretend to writeback registers in initiateAcc.Gabe Black
2010-10-18cache: minor SC assertion fixSteve Reinhardt
2010-10-17MIPS: Get rid of the backdoor device copy/pasted from and only used in Alpha.Gabe Black
2010-10-16Mem: Reclaim some request flags used by MIPS for alignment checking.Gabe Black
2010-10-15GetArgument: Rework getArgument so that X86_FS compiles again.Gabe Black
2010-10-14SPARC: Get rid of the copy/pasted StackTrace stolen from Alpha.Gabe Black
2010-10-13Mem: Change the CLREX flag to CLEAR_LL.Gabe Black
2010-10-10X86: Detect attempts to load a 32 bit kernel and panic.Gabe Black
2010-10-10SPARC: Make SPARC's ISA's clear function initialize everything it should.Gabe Black
2010-10-10Alpha: Force all the IPRs to an initial, determinstic value when cleared.Gabe Black
2010-10-10Alpha: Initialize the data TLB mode IPR.Gabe Black
2010-10-09UART: Make the 8250's MCR return a deterministic value.Gabe Black
2010-10-04Alpha: Fix Alpha NumMiscArchRegs constant.Gabe Black
2010-10-01Power: Fix compile error from previous push.Ali Saidi
2010-10-01ARM: Make the TLB a little bit faster by moving most recently used items to f...Ali Saidi
2010-10-01ARM: Add a fake flash controller so that unmodified linux can bootAli Saidi
2010-10-01ARM: Fix some subtle bugs in the GICPrakash Ramrakhyani
2010-10-01ARM: Implement functional virtual to physical address translationAli Saidi
2010-10-01Debug: Implement getArgument() and function skipping for ARM.Ali Saidi
2010-10-01ARM: Clean up use of TBit and JBit.Ali Saidi
2010-09-30CPU/Cache: Fix some errors exposed by valgrindAli Saidi
2010-09-29X86: Fix the RIP relative versions of the BT, BTC, BTR, and BTS instructions.Gabe Black
2010-09-22python: get rid of internal.enums package.Steve Reinhardt
2010-09-21stats: update stats for previous csetSteve Reinhardt
2010-09-21cache: improve coherence handling of writebacksSteve Reinhardt
2010-09-21diff-out: clean up optionsSteve Reinhardt
2010-09-21tests: print if output files matchSteve Reinhardt
2010-09-20CPU: Fix O3 and possible InOrder segfaults in FS.Gabe Black
2010-09-16devices: undo cset 017baf09599f that added timer drain functions.Steve Reinhardt
2010-09-14X86: Make the halt microop non-speculative.Gabe Black
2010-09-14X86: Make unrecognized instructions behave better in x86.Gabe Black
2010-09-14CPU: Trim unnecessary includes from some common files.Gabe Black
2010-09-13CPU: Get rid of the now unnecessary getInst/setInst family of functions.Gabe Black
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-09-12swig: make all generated files go into the m5.internal packageNathan Binkert
2010-09-10style: fix sorting of includes and whitespace in some filesNathan Binkert
2010-09-09scons: Stop building the big monolithic swigged params moduleNathan Binkert
2010-09-09init: don't build files that centralize python and swig codeNathan Binkert
2010-09-09scons: use code_formatter wherever we can in the build systemNathan Binkert
2010-09-09code_formatter: make it easier to insert whitespaceNathan Binkert
2010-09-09swig: don't override SWIG_name anymoreNathan Binkert
2010-09-09stats: update stats for preceding coherence changesSteve Reinhardt
2010-09-09cache: fail SC when invalidated while waiting for busSteve Reinhardt
2010-09-09mem: fix functional accesses to deal with coherence changeSteve Reinhardt
2010-09-09cache: coherence protocol enhancements & bug fixesSteve Reinhardt