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AgeCommit message (Expand)Author
2019-05-17configs: Generalize FileSystemConfig for non se.pyJason Lowe-Power
2019-05-17arch-arm: implement VMINNM and VMAXNM scalar versionCiro Santilli
2019-05-17arch-arm: implement VMINNM and VMAXNM SIMD versionCiro Santilli
2019-05-17arch-arm: rename operands to match spec in isa/formats/fp.isaCiro Santilli
2019-05-14mem-ruby: MOESI_CMP_dir cleanupTiago Muck
2019-05-14mem-ruby: Cache latencies for MOESI_CMP_dirTiago Muck
2019-05-14mem-ruby: Hit latencies defined by the controllersTiago Muck
2019-05-14mem-ruby: Do not change blocked msg enqueue infoTiago Muck
2019-05-14mem-ruby: Unique ranks for MOESI_CMP_dir in portsTiago Muck
2019-05-14mem-ruby: Change MOESI_CMP_Dir L2 addressingTiago Muck
2019-05-14mem-ruby: Fix MOESI_CMP_dir debug msgTiago Muck
2019-05-14mem-ruby: Prevent response stalls on MOESI_CMP_directoryTiago Muck
2019-05-14arch-arm: Do not check MustBeOne flag for TLB requests from the prefetcherJavier Bueno
2019-05-14configs: Fix duplicate branchPred reference in Simulation.pyJavier Bueno
2019-05-14Revert "cpu: fix how a thread starts up in MinorCPU"Giacomo Travaglini
2019-05-14Revert "cpu: stop scheduling suspended threads in MinorCPU"Giacomo Travaglini
2019-05-14Revert "cpu: fix branching when thread is suspended in MinorCPU"Giacomo Travaglini
2019-05-14mem-cache: Use SatCounter for prefetchersDaniel
2019-05-14base: Add operators to SatCounterDaniel
2019-05-14base: Add GTest to SatCounterDaniel
2019-05-14base: Move SatCounter to base directoryDaniel
2019-05-14cpu: Revamp saturating countersDaniel
2019-05-13config: add an option to list and select indirect branch predictorJairo Balart
2019-05-13cpu: Make the indirect predictor into a SimObjectJairo Balart
2019-05-12mem-ruby: Replace string parameter in MultiBitSelBloomFilterDaniel R. Carvalho
2019-05-11arch-arm: Add initial support for SVE contiguous loads/storesGiacomo Gabrielli
2019-05-11cpu,mem: Add support for partial loads/stores and wide mem. accessesGiacomo Gabrielli
2019-05-11cpu: Add a memory access predicateGiacomo Gabrielli
2019-05-10config, sim-se: bugfix for 54c77aa0Brandon Potter
2019-05-09configs: Fix FileSystemConfig importDaniel R. Carvalho
2019-05-09tests: Fix import scope of testDaniel R. Carvalho
2019-05-09mem-ruby: Fix MOESI_CMP_directory blocked line handlingTiago Muck
2019-05-08mem-cache: Remove writebacks packet listDaniel R. Carvalho
2019-05-08mem-cache: Handle data expansionDaniel R. Carvalho
2019-05-08mem-cache: Add co-allocation function to compressed tagsDaniel R. Carvalho
2019-05-08mem-cache: Add compression and decompression callsDaniel R. Carvalho
2019-05-08mem-cache: Create BDI CompressorDaniel R. Carvalho
2019-05-08mem-cache: Add compression statsDaniel R. Carvalho
2019-05-08mem-cache: Create cache compressorDaniel R. Carvalho
2019-05-08mem-cache: Add block size to findVictimDaniel R. Carvalho
2019-05-08mem-cache: Add compression data to CompressionBlkDaniel R. Carvalho
2019-05-08mem-cache: Create CacheComp debug flagDaniel R. Carvalho
2019-05-08mem-cache: Stub compression frameworkDaniel R. Carvalho
2019-05-07x86: Mark translation as delayed in case of a hw page table walkGabor Dozsa
2019-05-06sim-se: correct statfs inclusion on !linux hostAndrea Mondelli
2019-05-04arch-riscv: Implement MHARTID CSRAlec Roelke
2019-05-03sim-se: fix a few bugs/warns from GCC 6Joe Gross
2019-05-03sim-se: add eventfd system callBrandon Potter
2019-05-03mem-cache: Mark block as dirty after a SWPrefetchEXRespNikos Nikoleris
2019-05-03arch-riscv,isa: Fix for compressed jump (c_j) immAvishai Tvila
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