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2019-09-24ext: Updated Pybind11 to version 2.4.1.Bobby R. Bruce
This updates Pybind11 from version 2.2.1 to version 2.4.1. This fixes warning/error received when "<experiment/optional>" is used when compiling using c++14 with clang. It should be noted that "ext/pybind11/include/pybind11/std.h" has been changed to include a fix added by commit ba42457254cc362eddc099f22b60d469cc6369e0. This is necessary to avoid build errors. Built: Linux (gcc, c++11) and MacOS (clang, c++14). Tested: Ran quick tests for X86, ARM, and RISC-V. Deprecates: https://gem5-review.googlesource.com/c/public/gem5/+/21019 Change-Id: Ie9783511cb6be50136076a55330e645f4f36d075 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21119 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-24cpu: Fix checker cpu instantiationNikos Nikoleris
This change uses the params as instantiated from the default constructor to create the checker cpu. If any of these parameters are invalid for the checker cpu, the simulation will exit with a warning. Change-Id: I0e58ed096c9ea5f413f2e9b64d8d184d9b0fc84e Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21079 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-23cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor>Jordi Vaquero
This change is based on modify the way we move the AtomicOpFunctor* through gem5 in order to mantain proper ownership of the object and ensuring its destruction when it is no longer used. Doing that we fix at the same time a memory leak in Request.hh where we were assigning a new AtomicOpFunctor* without destroying the previous one. This change creates a new type AtomicOpFunctor_ptr as a std::unique_ptr<AtomicOpFunctor> and move its ownership as needed. Except for its only usage when AtomicOpFunc() is called. Change-Id: Ic516f9d8217cb1ae1f0a19500e5da0336da9fd4f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20919 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-21mem: Delete the now unused Message*Port classes.Gabe Black
This port type is no longer used. Change-Id: If4abbb774819644bea58fd82e00dfdec8f79b5a6 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20822 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-09-21x86: Templatize the IntMasterPort.Gabe Black
This makes the IntMasterPort usable with any class, making it possible to avoid inheriting from IntDevice. It also makes IntMasterPort inherit directly from QueuedMasterPort, skipping over MessageMasterPort. Change-Id: I9d218556c838ea567ced5f6fa4d57a3ec9d28d31 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20821 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2019-09-21x86: Templatize IntSlavePort.Gabe Black
This makes the device IntSlavePort calls back into based on a template parameter so that IntDevice doesn't have to be in the inheritance hierarchy to use it. It also makes IntSlavePort inherit from SimpleTimingPort directly, skipping over MessageSlavePort. Change-Id: Ic3213edc9c3ed5e506ee1e9f5e082cd47d7c7998 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20820 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2019-09-21x86: Turn the local APIC into a PioDevice instead of a BasicPioDevice.Gabe Black
This will let us accept several address ranges through our pio port instead of just one, and that will in turn let us accept interrupt requests and pio requests through the same port. Change-Id: I70b78c8cd0edca7fe58b3d4cd241e41d9e0f2c20 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20819 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-20gpu-compute: Fix overriden errorsJing Qu
When building Gem5 with GPU protocols, overriden errors were thrown from files in gpu-compute. After adding override to the files, the errors were resolved and Gem5 builds successfully. Change-Id: Iab3a0768caf82c226e8bbee5690a834bf92d1e03 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20939 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-20dev, x86: Delete the now unused X86 specific interrupt pins/lines.Gabe Black
Change-Id: I3915f0ad673119b551dcc4c5cedec180a9b88735 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20702 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-20dev, x86: Convert x86 devices to the generic int pins.Gabe Black
Change-Id: I4551ad00cf205c31555c90b53e87bc206a8d8729 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20701 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-20arch-x86: ignore non-temporal hint for movntps/movntpd SSE instsPouya Fotouhi
Making the implementation of movntps/movntpd consistent with other non-temporal instructions. We are ignoring the hint here, and implementing those instructions as cacheable instructions. This change adds a warning to let user know about this workaround. Also, this change add the address check for second part of move. Change-Id: I811652b24cf39ca2f5c5d4c9e9e417f69190b55c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20408 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-19dev: Terminal output's dump name conflictsAndrea Mondelli
The recently Terminal dump options name introduced in patch 1c72e90 conflict with MacOS stdio.h header. From stdio.h: #define stdin __stdinp #define stdout __stdoutp #define stderr __stderrp To remove this conflict, the TerminalDump options are renamed. Change-Id: I1b60fa1031328fc32d6a58bf7889b6e479d95219 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20959 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-19arch-x86: Change warn to warn_once for NT instructionsHoa Nguyen
Change-Id: I50353716f2a913b9b106b140644d95991879f662 Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21039 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-19python: Don't try to bind a stat group to the NULL simobject.Gabe Black
That is a SimObject like object which is used when a SimObject parameter is purposefully left empty, vs. being accidentally left empty through a typo or accidental ommission. It doesn't have a getCCObject method, and attempting to use it anyway causes gem5 to crash. Change-Id: Ie86321fbdbcc41cf88b7009184423acd7b64484b Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21059 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-19misc: Update MAINTAINERSJason Lowe-Power
Change-Id: I13ca12d4dd170ce3db03d851829df9bc62d1a74c Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20999 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-19dev-arm: Conditionally enable HDLcd when doing DTB autogenGiacomo Travaglini
This is a preparation change for a real DTB autogen implementation Change-Id: Ia0c1c5e65ea96036e55455eb4222cec12944d33a Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20331 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-19dev-arm: Add HDLcd DTB autogenerationGiacomo Travaglini
A Display has been defined. Its sole purpose is to generate the device tree node to be referenced by the HDLcd device. The encoder parameters are based on the existing node defined in: system/arm/dt/armv8.dts Change-Id: I6cdeb0437dce207dbd0f2c65c16b224245eb74e1 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20330 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-19arch-arm: PSTATE.PAN changes should inval cached regs in TLBGiacomo Travaglini
Change-Id: Id94e355fec345d2e952539a7dce7fbd21ed220c6 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20983 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-18system-arm: Add ITS node in platforms/vexpress_gem5_v2_base.dtsiAdrian Herrera
This is aligning sources with DTB autogeneration Change-Id: Icf369eb85719c91da770398b45645d8b03d8abf3 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20982 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-18arch-arm: Fix Data Abort ISS when caused by Atomic operationGiacomo Travaglini
Data Aborts caused by an atomic instruction have a special rule for their syndrome: From a ISS point of view they count as read if a read to that address would generate a fault; they count as writes otherwise (ISS.WnR bit) This patch is implementing this in the TLB. For permission faults we need to explicitly check if a read would trigger a fault (e.g. checking for the AP bits) since permissions can allow read-only accesses. For other MMU exceptions (like translation faults) we are confident the nature of the access doesn't affect the genration of a fault. This means that if the access is atomic, we treat it as a read from an ISS.WnR point of view. Change-Id: Ia524aa6ae07f81513cdc26c516b5fd9b01a931c3 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20981 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-18arch-arm: ISV bit in DataAbort should check for translation stageGiacomo Travaglini
According to the ESR spec, the ISV bit is set to 1 only for stage 2 aborts. Change-Id: Id524ef36e82184f741e968ddba04ca8ccdd4ad58 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20980 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-18arch-arm: PSTATE.PAN affecting EL2 only when HCR_EL2.E2H=1Giacomo Travaglini
Change-Id: I6df0cdcbadca17f30d3de3bed887f75c739b00f0 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20979 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-18arch, x86: Rework the debug faults and microops.Gabe Black
This makes the non-fatal microops advance the PC, and adds missing functions. The *_once Faults now also can be run once per *something*. They would previously be run once per Fault invoke function which is common to all M5WarnOnceFaults. The warn_once microop will now warn once per message. Change-Id: I05974b93f3b2700077a411b243679c2ff0e8c2cb Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20739 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-17systemc: Make TLM port wrappers for tlm_base_(target|initiator)_socket.Gabe Black
These are useful if using TLM sockets without using the standard TLM protocol. For instance, when used with ARM's fast models, this can wrap sockets which carry the opaque GICv3Comms protocol. Change-Id: I329a919068f958abbde2cb83683d3a3ae2e05a20 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20860 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-17systemc: Expose the utility functions for payload->packet conversion.Gabe Black
These can be used anywhere someone needs to turn a packet into a payload or vice-versa. Change-Id: I26a1f134e6fbec81b230a2853cf79264e80bf2dc Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20859 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-16dev-arm: Allow IOMMU binding to HDLcdGiacomo Travaglini
Change-Id: I894080e7bd76e7efedef141c937e1561c0c0527c Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20841 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-13dev-arm: Store the IOMMU reference from within the SMMU::connectGiacomo Travaglini
Change-Id: I35718a71dc040ee4acad9eee2a07076ebb571304 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20840 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-13dev: Enable DTB IOMMU binding with a DMA objectGiacomo Travaglini
This happens by storing a iommu reference in the dma device, and by calling the addIommuProperty method once doing dtb autogeneration for the device Change-Id: Ibd585addac686a9eeaba6959f459d81901087549 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20839 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-13sparc: Fix a warning/error in tlb.cc.Gabe Black
gcc has started to not like memseting an ojbect to zero in some cases. Cast the TlbEntry pointer to a void * before memsetting it to placate gcc. Change-Id: Iccb3c326fdb82f1f111329ff1a80bb6719cace47 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20830 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2019-09-12dev: Generalize the x86 int source/sink pins.Gabe Black
Sink pins are now templated based on the underlying device types, and the pins themselves are based on the new, generalized Port mechanism. Change-Id: I09c678c56f6eb6b4a167c12f221ae0241fe99c2d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20700 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-12mem-cache: Fix BDI size calculationDaniel R. Carvalho
The bitmask field indicates to which base a delta refers, and in the original paper it is fixed and proportional to the highest number of bases allowed in the compressed data. Change-Id: I271bf2e19e0765de52b933eaf6d4fcc2ce25d185 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19748 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-12base: Add a perfect bloom filterDaniel R. Carvalho
Add a bloom filter that keeps track of all observed entries, and thus has no false negatives nor false positives. Change-Id: Iba784e617a99c77554c688470d9b9e12c260f23b Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18879 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2019-09-10stats: Add M5_VAR_USED to variableTommaso Marinelli
Fixes compile error for gem5.fast due to unused variable. Change-Id: Ib1664b100e95a741174610f8cdbdebaff9635f66 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20759 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-10stats: Fix incorrect name conflict panic with grouped statsAndreas Sandberg
Info::setName() performs a sanity check to ensure that the same stat name isn't used twice. This doesn't work for new-style stats with a parent group since the name is only unique within the group. Disable the check for new-style stats since these usually use names generated from member variable names. Change-Id: I590abe6040407c6a4fe582c0782a418165ff5588 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20760 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-10stats: Ignore non-Group objects in stat hierarchyChun-Chen TK Hsu
Some objects, such as SystemC modules, are not a subclass of Stat::Group. Calling the addStatGroup function on them causes errors. This changes ignores those objects that are not Stat::Group in the stat hierarchy. Signed-off-by: Chun-Chen TK Hsu <chunchenhsu@google.com> Change-Id: I9b62419417b7af7331461fbfaf15e45a4ee2b35f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20680 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-10base: Make Bloom Filter counting by defaultDaniel R. Carvalho
Since a boolean bool filter is a saturating bloom filter with a single bit per entry, generalize them by using SatCounter instead of int for the filter entries. Change-Id: I7f54e28d54de5671e0770b02ed9161735e6bd339 Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18877 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2019-09-10base: Make Bulk inherit from MultiBitSel Bloom FilterDaniel R. Carvalho
Cleanup bulk's code and make it inherit from MultiBitSel. Change-Id: I83154feb30bb3dac3d02743bcafbdcb57489c2fd Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18876 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2019-09-10mem-ruby: Move Bloom Filters to baseDaniel R. Carvalho
All Bloom Filters are completely independent of Ruby, and therefore can be used everywhere. As a side effect, Ruby was not using the filters, so their dependency was removed. Change-Id: Ic5f430610c33c0791fb81c79101ebe737189497e Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18875 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-09-10mem: Mark MemObject as deprecated.Gabe Black
It's constructor will now warn that it's deprecated and suggest using ClockedObject directly. This change also gets rid of the params() method and the Params typedef since they are functionally equivalent to the ClockedObject versions. It also removes the include of mem/port.hh which is not used in mem_object.hh. This may break code which purposefully or (more likely) accidentally depended on that transitive include from mem_object.hh. Change-Id: I6dab3ba626e3f3ab6a6bd86edcf4f5cb4d6d2c45 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20720 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-09dev-arm: Reset HPPI when clearing an LPIGiacomo Travaglini
Change-Id: I2a69e6cef69aa48d7c265d59915b859e5eac2bcc Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20638 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev-arm: Add resetHppi method in the GICv3 cpu interfaceGiacomo Travaglini
The method is used for resetting the highest priority pending interrupt interrupt from the cpu interface if it matches the intid passed as an argument. Change-Id: I9fbc4cb3e05a1cc32f853b6afab5c2bc99369435 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20637 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev-arm: Cleanup GICv3 initializationGiacomo Travaglini
This patch is removing the unnecessary initState() / reset() methods from GICv3 classes, since we can initialize everything at construction/init time Change-Id: Ia70edcc4ca4f11878fac0024342e4f2cd81883a0 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20636 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev-arm: Initialize GICD_TYPER once at construction timeGiacomo Travaglini
Change-Id: Ib4dfdf7005709c22b4ba95099b1192f6edd6ff06 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20635 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev-arm: Writes to IGRPEN1_EL3 triggering updateGiacomo Travaglini
Change-Id: I56804eb1bfc8913bd0d3cab05865a382bf270bc1 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20634 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev-arm: Fix GICv3 ITS cmdq wrappingGiacomo Travaglini
Change-Id: I979e8d1378d5b5d2647158798479cf4238f2c349 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20633 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev-arm: Fix mapping between IGRPEN1_EL3 and IGRPEN1_EL1Giacomo Travaglini
Previous mapping was wrong because it was checking which security bits it was accessing by using the inSecureState() function, whereas it should have used the isSecureBelowEL3(). This patch is not making the sostitution since it is optimizing the mapping furthermore by avoiding updating both IGRPEN1_EL1 and IGRPEN1_EL3 on writes. The IGRPEN1_EL1 register is used as a storage, and any reads/writes to IGRPEN1_EL3 is routed to that register. Change-Id: Id318ec44e19d4f844e4e3410d74d0c4f89810811 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20632 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev-arm: Implement message-based SPIsGiacomo Travaglini
Change-Id: I35e79dfd572c3e0d9cadc8e0aab01befd6004ece Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20631 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-09dev: Scrub out some lingering uses of MemObject.Gabe Black
MemObject doesn't do anything any more, and is basically just an alias for ClockedObject. Change-Id: Ic0e1658609e4e1d7f4b829fbc421f222e4869dee Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20719 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
2019-09-07dev-arm: Add GICD_SGIR registerGiacomo Travaglini
The Distributor Software Generated Interrupt Register is implemented only if affinity routing is disabled. Since this configuration is currently not supported in gem5, it has to be treated as RES0. Change-Id: I9ffcb31b26fc17547f74a4f1d43ce72c59786fa8 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20630 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-09-07python: Make the dot writer handle unconnected Port vector elements.Gabe Black
Change-Id: I5234013716cdcce5fc39e239dc3d92cd1f2b7799 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20699 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 21:45:54 +0000