summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2006-11-13Update output refs. Some FS statistics will change (namely the ITB) due to ↵Kevin Lim
the recent TLB changes. Now PAL mode accesses are counted as hits in the TLB. tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out: tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr: tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/o3-timing/stderr: tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt: tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini: tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out: Update refs. --HG-- extra : convert_revision : 6798c5753d4d7bd7b5667d59cf564012b781ce8a
2006-11-12Fix typo.Kevin Lim
--HG-- extra : convert_revision : 05db10e20d33302fe830d5759b8881b1233aca87
2006-11-12Fix for regression failure.Kevin Lim
src/cpu/o3/fetch_impl.hh: Fetch needs to make sure it isn't waiting on an Icache access. --HG-- extra : convert_revision : b53eb58b9e5a00bdb394134586d1f84f84d1c6e1
2006-11-12Merge ktlim@zamp:./local/clean/tmp/test-regressKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
2006-11-12Fix for non-FS compile.Kevin Lim
--HG-- extra : convert_revision : 661b412b0ae670181b89cb7dbc5e9d813804aa7a
2006-11-12Create a module called internal where swigged stuff goes.Nathan Binkert
Rename cc_main to internal.main --HG-- extra : convert_revision : e938005f600fbf8a43435e29426a948f4501f072
2006-11-12Updates to support new interrupt processing and removal of PcPAL.Kevin Lim
src/arch/alpha/interrupts.hh: No need for this now that the ThreadContext is being used to set these IPRs in interrupts. Also split up the interrupt checking from the updating of the IPL and interrupt summary. src/arch/alpha/tlb.cc: Check the PC for whether or not it's in PAL mode, not the addr. src/cpu/o3/alpha/cpu.hh: Split up getting the interrupt from actually processing the interrupt. src/cpu/o3/alpha/cpu_impl.hh: Splut up the processing of interrupts. src/cpu/o3/commit_impl.hh: Update for ISA-oriented interrupt changes. src/cpu/o3/fetch_impl.hh: Fix broken if statement from PcPAL updates, and properly populate the request fields. Also more debugging output. src/cpu/ozone/cpu_impl.hh: Updates for ISA-oriented interrupt stuff. src/cpu/ozone/front_end_impl.hh: Populate request fields properly. src/cpu/simple/base.cc: Update for interrupt stuff. --HG-- extra : convert_revision : 9bac3f9ffed4948ee788699b2fa8419bc1ca647c
2006-11-12Update for maxtick in splash2/memtest configsRon Dreslinski
configs/example/memtest.py: configs/splash2/run.py: Update for maxtick --HG-- extra : convert_revision : 94106625be1ebc2b614db16720a4861e47222c0b
2006-11-12Update refs for functional access fixesRon Dreslinski
--HG-- extra : convert_revision : aa34e0e7254daf20ecb7c14d430f08927a8fb9ca
2006-11-12Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 498304c24435437f8f1942bb8aeafe69ba22a089
2006-11-12Physical memory overrides the tport version of recvFunctional, need to do theRon Dreslinski
check here for responses that match as well --HG-- extra : convert_revision : 69c3628a381a9da885fab0272abf40c3411a5f0f
2006-11-12Handle packets being deleted by lower level properly.Ron Dreslinski
Fixes for Mem Leak associated with Writebacks. src/mem/cache/miss/mshr_queue.cc: Fixes for Mem Leak associated with Writebacks. (Double Delete removed) --HG-- extra : convert_revision : 7a52ddd57da35995896f2c4438a58aa53f762416
2006-11-12Don't insert reponses into the list more than onceRon Dreslinski
If you get inserted in the front, reschedule the event --HG-- extra : convert_revision : eccbacf5ec85600e5b68eb554fee2c0e2b65e965
2006-11-12Move code before a early return to make sure it is executed on all pathsRon Dreslinski
--HG-- extra : convert_revision : cfdd5b6911422fbb733677c43d027aa4407fbc85
2006-11-12Yet another small bug in mem system related to flow controlRon Dreslinski
src/mem/cache/cache_impl.hh: When upgrades change to readEx make sure to allocate the block Fix dprintf --HG-- extra : convert_revision : 8700a7e47ad042c8708302620b907849c4bfdded
2006-11-12Fix functional access errors related to delayed respnoses in cachePortRon Dreslinski
src/mem/cache/base_cache.cc: On a delayed response, be sure to call the fixPacket wrapper to toggle hasData flag. src/mem/packet.cc: src/mem/packet.hh: Create a wrapper to toggle the hasData flag on delayed responses --HG-- extra : convert_revision : 1ced8d4e3dc12a059fb7636d59e429cd3dd46901
2006-11-11Fix TypoNathan Binkert
--HG-- extra : convert_revision : 4f5b610f364876b29ad0e04f1757e4b42d1f2bd8
2006-11-11set TRACING_ON one way or another explicitly in theNathan Binkert
SConscript file instead of basing it on DEBUG --HG-- extra : convert_revision : 6e6807cc4350ef92baeaaabfeb3dc0bb785128ba
2006-11-11Delete the actual PseudoInst fileNathan Binkert
--HG-- extra : convert_revision : 54e3dfbc1022fcc663a9c0e67f6434395d1fe33c
2006-11-11Get rid of the ParamContext for pseudo instructions and moveNathan Binkert
the parameters to the BaseCPU object. --HG-- extra : convert_revision : 557292cffb40918133647b0c9ac653ee5112df2e
2006-11-11The Lock_Flag_DepTag went away earlier, and using TheISA gives the false ↵Gabe Black
impression that this code is ISA independent. --HG-- extra : convert_revision : 67d9e51702efbe5f5244268e3753328a6cf1a1d5
2006-11-11Certain header files should only be used in FS.Gabe Black
src/arch/alpha/faults.hh: Only use pagetable.hh in FS src/arch/alpha/pagetable.hh: pagetable.hh should only be included in FS, so protecting it internally should be unnecessary. src/cpu/exetrace.cc: Only use tlb.hh in FS --HG-- extra : convert_revision : 91ea61f2e7970e7146b6d407ee250fcb20cd4d48
2006-11-10More fixes for functional accesses. It now makes the writeback memory leak ↵Ron Dreslinski
to crash all configs. Working on that now. src/mem/cache/base_cache.cc: Keep a list of the responders so we can search them on functional accesses. src/mem/cache/base_cache.hh: Properly put things on a list for responses so we can search the list. Also, be sure to check the outgoing ports lists on a functional access (factor some common code out there) src/mem/cache/cache_impl.hh: Properly return when the first read hit on a functional access. Make sure to call to check the other ports list of packets before forwarding it out. --HG-- extra : convert_revision : 1d21cb55ff29c15716617efc48441329707c088a
2006-11-10Big fix for functional access, where we forgot to copy the last byte on ↵Ron Dreslinski
write intersections. src/mem/packet.cc: Make sure to copy the whole data (we were one byte short) src/mem/tport.cc: Fix for the proper semantics of fixPacket --HG-- extra : convert_revision : 215e05db9099d427afd4994f5b29079354c847d8
2006-11-10Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : e4f9bb663099662a94c5522e6b4955c2a83bac8d
2006-11-10fix endian issues with condition codesAli Saidi
use memcpy instead of bcopy s/u_int32_t/uint32_t/g fixup endian code to work with solaris hack to make sure htole() works... Nate, have a good idea to fix this? src/arch/sparc/faults.cc: set the reset address to be 40 bits. Makes PC printing easier at least for now. src/arch/sparc/isa/base.isa: fix endian issues with condition codes src/arch/sparc/tlb.hh: add implemented physical addres constants src/arch/sparc/utility.hh: add tlb.hh to utilities src/base/loader/raw_object.cc: add a symbol <filename>_start to the symbol table for binaries files src/base/remote_gdb.cc: use memcpy instead of bcopy src/cpu/exetrace.cc: clean up printing a bit more src/cpu/m5legion_interface.h: add tons to the shared interface src/dev/ethertap.cc: s/u_int32_t/uint32_t/g src/dev/ide_atareg.h: fixup endian code to work with solaris src/dev/pcidev.cc: src/sim/param.hh: hack to make sure htole() works... --HG-- extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
2006-11-10Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem --HG-- extra : convert_revision : 35e2ff6ce62281299ad98dca64ba04a3a8a6757c
2006-11-10Elaborated on the tlb stubs so that they just set the physical address to ↵Gabe Black
the virtual address. --HG-- extra : convert_revision : 41478abc4d21d504420f6842338675c0767f7cf9
2006-11-10Fixed up DepTags a little. I think NumMicroIntRegs shouldn't be added to ↵Gabe Black
Ctrl_Base_DepTag. --HG-- extra : convert_revision : 2ebb3eb781441ba936c8d8bb1f42e4c0840aff2e
2006-11-10Added StrandStsReg operand.Gabe Black
--HG-- extra : convert_revision : 51be41716ed9fe0e99e53f2341ad5651a525055a
2006-11-10Put in provisions for rd, rdpr, rdhpr, wr, wrpr, and wrhpr to disassemble ↵Gabe Black
properly. --HG-- extra : convert_revision : f2cad8a5879999438ba9b05f15a91320e7a4cc4a
2006-11-10Made the annul of unconditional conditional branches behave properly, added ↵Gabe Black
code to read and write the strand_sts_reg, and made restored a Priv instruction. --HG-- extra : convert_revision : 386512215f7243d230717c369217f8d2f9ada935
2006-11-10Fixed up the code that prints out registers to take into account microregisters.Gabe Black
--HG-- extra : convert_revision : 6809de467e4500ce34447c0544caf0ba04af81e7
2006-11-10Tweaked debug output.Gabe Black
--HG-- extra : convert_revision : cd33b7c1ebdbefd42f18c1435b2519d06d9914a6
2006-11-10Touched up faults, and made POR actually do something.Gabe Black
--HG-- extra : convert_revision : 38951352edbfc423fb6767a9aac49a703578c0ac
2006-11-10Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem --HG-- extra : convert_revision : 0c2db1e1b5fdb91c1ac5705ab872a6bfb575a67a
2006-11-10Also include a function to form the input path.Kevin Lim
--HG-- extra : convert_revision : d2141e3b8c56296fbbe2c4c1ceb80616f269884a
2006-11-10Try to setup commands properly.Kevin Lim
--HG-- extra : convert_revision : 9f4af3c5f52841b10e9f17c48470716703a1be67
2006-11-10Change up some warnings to DPRINTFs.Kevin Lim
--HG-- extra : convert_revision : b3e9fa094d68f608865dedfc9f3f4125a20fd748
2006-11-10Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : 56cb7fe3be5b63bd89b48ac6cb88b47d13b4c137
2006-11-10Actually finished moving the register file stuff around.Gabe Black
--HG-- extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
2006-11-10Moved the Alpha float regfile into it's own regfile and got rid of ↵Gabe Black
constants.hh and isa_traits.cc --HG-- extra : convert_revision : 55afd7d21c276906520da375b3bbb563be420880
2006-11-10Split out alpha integer register file into it's own files.Gabe Black
--HG-- extra : convert_revision : 164bdcec2860c5dca3f0f11d189781b88dd717cb
2006-11-10The reset function of the MiscRegFile really resets it now. This function is ↵Gabe Black
called from the class's constructor. --HG-- extra : convert_revision : 4e7a40ffe0a9a71fd1b2b171d9c0dcac50e1a1fe
2006-11-10Set the ASI register to be something explicitly so that simulation is ↵Gabe Black
deterministic. --HG-- extra : convert_revision : 38cd06f946fc0cc22288f71f567e77ce8fdfea99
2006-11-10Change exetrace code for working with my trace tool to use stream io rather ↵Gabe Black
than sprintf which was breaking on 64 bit hosts. --HG-- extra : convert_revision : 184d751392dfcc8c80ac1a6c0ebc3061ff0a3f20
2006-11-10Fix up instructions to read and write control registers, and got rid of the ↵Gabe Black
control register fields which won't work on a big endian host. --HG-- extra : convert_revision : 1b518873b6e1a073b58cbe27642537d5ae3a604d
2006-11-09Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha ↵Gabe Black
specific DepTag constants. --HG-- extra : convert_revision : e4af5e2fb2a6953f8837ad9bda309b7d6fa7abfb
2006-11-09Fix a couple uninitialized variables.Gabe Black
--HG-- extra : convert_revision : d17d28a9520524e5f56bd79beb9b2be6ce76a22f
2006-11-09Get SPARC to the point that it starts running. Add ability to load the ROM ↵Ali Saidi
bin files, cleanup lockstep printing a bit Since we don't have a platform yet, you need to comment out the default responder stuff in Bus.py to make it work. SConstruct: Add TARGET_ISA to the list of environment variables that end up in the build_env for python configs/common/FSConfig.py: add a simple SPARC system to being testing with, you'll need to change makeLinuxAlphaSystem to makeSparcSystem in fs.py for now src/SConscript: add a raw file object, at least until we get more info about how to compile openboot properly src/arch/sparc/system.cc: src/arch/sparc/system.hh: add parameters for ROM files (OBP/Reset/Hypervisor), a ROM, load files into ROM src/base/loader/object_file.cc: src/base/loader/object_file.hh: add option to try raw when nothing works src/cpu/exetrace.cc: cleanup lockstep printing a little bit src/cpu/m5legion_interface.h: change the instruction to be 32 bits because it is src/mem/physical.cc: fix assert that doesn't work if memory starts somewhere above 0 src/python/m5/objects/BaseCPU.py: Add if statement to choose between sparc tlbs and alpha tlbs src/python/m5/objects/System.py: Add a sparc system that sets the rom addresses correctly src/python/m5/params.py: add the ability to add Addr() together --HG-- extra : convert_revision : bbbd8a56134f2dda2728091f740e2f7119b0c4af
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 20:17:21 +0000