Age | Commit message (Collapse) | Author |
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arch/alpha/utility.hh:
Got rid of unnecessary extern and static qualifiers, and fixed up the hand merge.
arch/sparc/regfile.hh:
Fixed up SPARC after a hand merge.
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extra : convert_revision : 56e2d90ddd144f3386dbea50fa96cfc461d46b81
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into ewok.(none):/home/gblack/m5/newmem
cpu/cpu_exec_context.cc:
Hand merge
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rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh
extra : convert_revision : bd18966f7c37c67c2bc7ca2633b58f70ce64409c
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rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh
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accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.
arch/alpha/arguments.cc:
Renamed readFloatRegInt to readFloatRegBits
arch/alpha/ev5.cc:
Removed the Double from setFloatRegDouble
arch/alpha/registerfile.hh:
Changed the floating point register file from a union of arrays to a class with appropriate accessor functions. The interface is necessary for SPARC.
arch/alpha/types.hh:
Changed the FloatReg type from a union of uint64_t and double to a double, and defined a new type FloatRegBits which is a uint64_t and is used to return the bits which compose a floating point register rather than the value of the register.
arch/isa_parser.py:
Adjusted the makeRead and makeWrite functions to generate the new versions of readFloatReg and setFloatReg.
base/remote_gdb.cc:
kern/tru64/tru64.hh:
Replaced setFloatRegInt with setFloatRegBits
cpu/cpu_exec_context.cc:
Removed the duplicated code for setting the floating point registers, and renamed the function to setFloatRegBits and readFloatRegBits.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/regfile.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.hh:
Implemented the new versions of the floating point read and set functions.
cpu/simple/cpu.cc:
Replaced setFloatRegDouble with setFloatReg
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extra : convert_revision : 3dad06224723137f6033c335fb8f6395636767f2
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ExecContext to another ExecContext. This makes it easier for anything that needs to copy architected registers to do so in an ISA independent fashion.
arch/alpha/ev5.cc:
copyIprs now copies from a source ExecContext to a destination ExecContext.
arch/alpha/registerfile.hh:
Have ISA specific functions to copy all architected registers from one ExecContext to another.
cpu/cpu_exec_context.cc:
Call the ISA in order to copy any architected registers.
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mem/mem_object.hh:
Change getPort() to be anonymous by default.
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extra : convert_revision : 6998885ddccfbf26bc470112f40c3f19913ba7e2
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there.
Get rid of addPort().
Change getPort() behavior on PhysicalMemory.
SConscript:
cpu/simple/cpu.hh:
sim/system.cc:
sim/system.hh:
Replace Memory with MemObject.
cpu/base.hh:
No need to declare Port here anymore.
cpu/cpu_exec_context.hh:
Need PageTable definition.
cpu/simple/cpu.cc:
mem/physical.cc:
mem/physical.hh:
Replace Memory with MemObject.
Get rid of addPort(); allow getting anonymous ports with getPort().
mem/translating_port.hh:
Remove unneeded header.
sim/process.cc:
Replace Memory with MemObject.
Change how initialization port gets set up to deal with change in
addPort()/getPort(). Current solution is not ideal but it works.
sim/process.hh:
Remove unneeded headers and declarations.
Make LiveProcess::getDesc() abstract instead of panicing if called.
sim/syscall_emul.hh:
Fix includes.
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arch/alpha/process.cc:
arch/mips/process.cc:
arch/sparc/process.cc:
You really do need the headers in the .cc file.
arch/alpha/process.hh:
Don't include unnecessary headers in another header.
Replace with forward class declarations.
arch/mips/process.hh:
arch/sparc/process.hh:
Don't include unnecessary headers in another header.
Replace with forward class declarations.
Also fix std namespace... no "using" in header files!
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extra : convert_revision : f2cd953d0f4a212bb8148cc54c329aa3c18deb89
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- Get rid of unused ProxyMemory class (replaced by TranslatingPort).
- Get rid of remaining unused prot_* functions.
mem/physical.cc:
mem/physical.hh:
mem/port.hh:
Get rid of remaining unused prot_* functions.
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extra : convert_revision : daf67203a26c8139f810cc4e8d16e652373f305b
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SE mode can now use page tables to determine which addresses are valid.
sim/process.cc:
sim/process.hh:
Get rid of validInstAddr() & validDataAddr().
SE mode can now use page tables to determine which addresses are valid.
Also get rid of some Process object fields that were only used by those functions.
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extra : convert_revision : 74a25c0c2453bfc598eedacdbfccea1cf6493ba6
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the right definitions of htog/gtoh etc.
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arch/alpha/isa_traits.hh:
No unprotected "using" in header files.
cpu/simple/cpu.cc:
Fix ISA namespace "using" statement.
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extra : convert_revision : 317ea40f8de00748d7613a0116edab05770bdc72
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into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem
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arch/alpha/isa_traits.hh:
used for SimpleCPU instead of explicitly calling the namespace we declare in isa_traits.hhs
so other archs. can use SimpleCPU
arch/mips/SConscript:
dont include common_syscall or tru64
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
Change Faults to new format
arch/mips/isa/decoder.isa:
Fix readMiscReg access
Made change so that you cant explicitly tell if a instruction nop,ehb,or ssnop... These are all variants
of the sll instruction so I may need to make a separte class of instructions to handle thse better
arch/mips/isa/includes.isa:
add isa_traits.hh and MipsISA included into every auto-gen file
arch/mips/isa_traits.cc:
create copyMiscRegs function...
delete useless code
arch/mips/isa_traits.hh:
clean up for build
arch/mips/linux_process.cc:
mem is now getMemPort(), linux process objects now take in a system argument
arch/mips/linux_process.hh:
new argument for linux process
arch/mips/process.cc:
add system
arch/mips/process.hh:
add system variable
cpu/cpu_exec_context.cc:
Change AlphaISA to TheISA
cpu/exec_context.hh:
add readNextNPC and setNextNPC functions
cpu/simple/cpu.cc:
include isa_traits for namespace declariation
cpu/simple/cpu.hh:
PC & NPC access/modify functions
arch/mips/utility.hh:
file needed for compile
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extra : convert_revision : 29a327e79c51c6174a6e526aa68c7aab7e7eb535
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into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head
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extra : convert_revision : a784e60b7f79d70b09052fc4a8ae35a821d307dc
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an obsolete function that doesn't exist.
arch/alpha/tru64/process.cc:
sim/process.cc:
Don't include useless header.
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extra : convert_revision : 1dd5edeb0703e2190b89ea5ff563df4c95b7cf59
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- know nothing about Fault objects (as it should be)
- call fatal() by default on accesses to unmapped addrs
- provide "try" versions for callers that are prepared to handle failure
mem/translating_port.cc:
mem/translating_port.hh:
Memory system objects should not return Fault objects, just errors.
Half the time we don't check the return code anyway, so make
default version of the access functions call fatal().
Provide "try*" versions that return a bool for places where we
really are going to check the return code.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Need to use new "tryReadString" here since we actually check the return code.
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extra : convert_revision : 039737398ef183904dc382c05912ab96cd1d4a51
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cpu/simple/cpu.cc:
Fix up fault message... 0x prefix is redundant when using %p.
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SConscript:
Compile in eio.cc again.
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sim/syscall_emul.cc:
Make message for exit() more obvious.
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problems in pool regressions).
util/qdo:
Bump up hardcoded NFS wait time from 45 sec to 90 sec (and
print threshold from 10 sec to 30 sec). Would be even
nicer to make these cmd-line params, but nobody would use
them anyway.
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arch/SConscript:
Sorted the switch headers, and added registerfile.hh, constants.hh, types.hh, and utility.hh.
arch/alpha/isa_traits.hh:
Moved the register file types to registerfile.hh, small functions to utility.hh, and cleaned out alot of stuff that isn't necessary anymore.
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
mem/port.hh:
sim/faults.cc:
sim/system.hh:
base/misc.hh isn't included through isa_traits.hh anymore.
cpu/simple/cpu.cc:
Added include for arch/utility.hh
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extra : convert_revision : 24f65f330f87e3c909c939596cfcf48336022eaf
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sim/host.hh:
Moved MaxAddr from arch to here, since it depends only on the Addr type.
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necessary anymore.
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here any more.
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included within isa_traits.hh
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arch/alpha/isa_traits.hh:
Moved constants from isa_traits.hh into constants.hh. Also removed the dependence on ev5.hh
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extra : convert_revision : f7a03c4ffb1394dcca5a5a96da468c3ff14e1974
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into ewok.(none):/home/gblack/m5/newmem
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extra : convert_revision : 58a5ae14fc8ac697206a3bfa1cf543a3579123d4
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Fixed the exec context proxy class to have a getMemPort function.
arch/alpha/linux/process.cc:
arch/alpha/tru64/process.cc:
kern/tru64/tru64.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Fix to use new exec context proxy
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it's used.
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arch/alpha/isa_traits.hh:
Pulled out basic type definitions into types.hh
arch/alpha/types.hh:
New BitKeeper file ``arch/alpha/types.hh''
For relatively basic types associated with an architecture. This does not include, for instance, register files.
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on execution.
configs/test/test.py:
Move test binary out of m5-test, don't depend on
m5-test/Benchmarks.
python/m5/objects/System.py:
Split out full-system-only parameters (lost in merge).
sim/system.cc:
Need to be able to instantiate System directly in SE mode
(lost in merge).
sim/system.hh:
A few more functions here are FS-only.
configs/test/hello:
Add in binary.
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rename : configs/test.py => configs/test/test.py
extra : convert_revision : 4051b18772e0a0dcb97eb591d4373683be9f4395
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arch/alpha/isa_traits.hh:
arch/alpha/linux/process.cc:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
base/chunk_generator.hh:
base/loader/elf_object.cc:
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
kern/linux/linux.hh:
kern/tru64/tru64.hh:
mem/packet.hh:
mem/page_table.cc:
mem/page_table.hh:
mem/physical.cc:
mem/request.hh:
mem/translating_port.cc:
sim/process.hh:
sim/system.cc:
Fixing merged changes.
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extra : convert_revision : 2e94f21009395db654880fcb94ec806b6f5772c3
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--HG--
rename : arch/alpha/isa_desc => arch/alpha/isa/main.isa
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux/process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux/process.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64/process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64/process.hh
rename : cpu/exec_context.cc => cpu/cpu_exec_context.cc
rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh
extra : convert_revision : 7d1efcedd708815d985a951f6f010fbd83dc27e8
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arch/alpha/isa_traits.hh:
arch/sparc/linux/process.cc:
fix merging problem
sim/syscall_emul.cc:
use setIntReg
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extra : convert_revision : e88d72e415493cd17d7b88c22c7e995f3199e396
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into zeep.eecs.umich.edu:/z/saidi/work/m5.ma2
arch/alpha/isa_traits.hh:
arch/alpha/linux/process.cc:
arch/sparc/isa_traits.hh:
arch/sparc/linux/process.cc:
sim/process.cc:
merge
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rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh
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