summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2006-08-20configs/example/fs.py:Steve Reinhardt
Arg to m5.simulate() is a delta, not an absolute curTick value. I didn't test this change, but I'm not convinced the previous example was tested either, so I don't feel too badly about it. configs/example/fs.py: Arg to m5.simulate() is a delta, not an absolute curTick value. I didn't test this change, but I'm not convinced the previous example was tested either, so I don't feel too badly about it. --HG-- extra : convert_revision : ef7df7b83b3e2b5da02408c674169ccbed75a441
2006-08-19SConscript:Steve Reinhardt
Fix BATCH_CMD bug. tests/SConscript: Fix BATCH_CMD bug. --HG-- extra : convert_revision : 696d51a67790506db749244edf4afab920a63d1b
2006-08-18Update reference outputsSteve Reinhardt
--HG-- extra : convert_revision : 110a6c51cc1c562d115492b7360bfdbbded8eefd
2006-08-18Add caches in, fix cpu.mem paramSteve Reinhardt
--HG-- extra : convert_revision : 486283d83786807c72bb4601e4b9613b55d8802c
2006-08-17Changes to build m5.fastSteve Reinhardt
--HG-- extra : convert_revision : 2ec600b8e72e40e8b96e3b1dbe0334aa05e0f30b
2006-08-17Add readfile back in.Kevin Lim
--HG-- extra : convert_revision : 0b64f2d95b439b19f1131fe00f45da56617b0026
2006-08-17Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/tmp/m5.newmem --HG-- extra : convert_revision : 49289cfe8d547045dd89133db71d16318bc8510b
2006-08-17add default range to PhysicalMemoryAli Saidi
--HG-- extra : convert_revision : 0a622ab0f0f7653d28d4ed3dd27113ae2bc82cae
2006-08-17SConstruct:Steve Reinhardt
rename build/*/test dir to build/*/tests for consistency SConstruct: rename build/*/test dir to build/*/tests for consistency --HG-- extra : convert_revision : 6af3cf6b2d6582b2c4d2bc9211e44767e0fa494f
2006-08-17AUTHORS:Lisa Hsu
minor change AUTHORS: minor change --HG-- extra : convert_revision : b638f14f0541ff5d48546c7fcd27d1bf0bdf615f
2006-08-17Merge zizzer:/bk/newmemLisa Hsu
into zed.eecs.umich.edu:/z/hsul/work/m5/newmem --HG-- extra : convert_revision : 382a9d4b420a9bdb35f93049306b7b7af0d33ad5
2006-08-17make tree rcS files reflect what we've been actually using in /dist.Lisa Hsu
also, update all the rcS files so that they are in sync with the new linux-dist build system. configs/boot/devtime.rcS: configs/boot/iscsi-client.rcS: configs/boot/iscsi-server.rcS: configs/boot/micro_memlat.rcS: configs/boot/micro_stream.rcS: configs/boot/micro_tlblat.rcS: configs/boot/nat-netperf-maerts-client.rcS: configs/boot/nat-netperf-server.rcS: configs/boot/nat-netperf-stream-client.rcS: configs/boot/nat-spec-surge-client.rcS: configs/boot/nat-spec-surge-server.rcS: configs/boot/natbox-netperf.rcS: configs/boot/natbox-spec-surge.rcS: configs/boot/netperf-rr.rcS: configs/boot/netperf-server.rcS: configs/boot/netperf-stream-client.rcS: configs/boot/netperf-stream-nt-client.rcS: configs/boot/nfs-client-nhfsstone.rcS: configs/boot/nfs-client-tcp-smallb.rcS: configs/boot/nfs-client-tcp.rcS: configs/boot/nfs-client.rcS: configs/boot/nfs-server-nhfsstone.rcS: configs/boot/nfs-server.rcS: configs/boot/ping-client.rcS: configs/boot/ping-server.rcS: configs/boot/spec-surge-client.rcS: configs/boot/spec-surge-server.rcS: configs/boot/surge-client.rcS: configs/boot/surge-server.rcS: make tree rcS files reflect what we've been actually using in /dist. --HG-- extra : convert_revision : 48fe4fe71938ef9d029e428028a271242c8d2faa
2006-08-16we don't want the old memory timing dram model eitherAli Saidi
--HG-- extra : convert_revision : 7de51b1e42cff8c0f377a21cfcb6d1d13df1847a
2006-08-16Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/tmp/m5.newmem --HG-- extra : convert_revision : b754945635cc0864fdd68ec4bee736aab9bca407
2006-08-16DRAM Memory doesn't crash the simulator now.. still untested.Ali Saidi
--HG-- extra : convert_revision : fa2d2c5ec4073383f1b2b2f466d0245f2d6a6c35
2006-08-16we don't want the splash2 config files either, they haven't been converted yetAli Saidi
--HG-- extra : convert_revision : 09adadca1ead8d32589cf7a243fddd24fcc51f4b
2006-08-16Add checkpointing and configuration stuff to the people that worked on itNathan Binkert
--HG-- extra : convert_revision : 565f0144d3aa6194665e49e3b0ad314c5d671bba
2006-08-16Added in SPARC ISA specifically. Thanks to whoever fleshed out my entry.Gabe Black
--HG-- extra : convert_revision : acb123227c7efbb46cc25e0ca69f7b2e2ec5b9c1
2006-08-16add etherdump file optionAli Saidi
--HG-- extra : convert_revision : 6b62398778208bc4e64582e06fb73b71a94f3014
2006-08-16Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/tmp/m5.newmem --HG-- extra : convert_revision : f4fa62290ca2bbd4726fb6c8e89655dade53bb68
2006-08-16Fix Physical Memory to allow memory sizes bigger than 128MB.Ali Saidi
Kinda port DRAM to new memory system. The code is *really* ugly (not my fault) and right now something about the stats it uses causes a simulator segfault. src/SConscript: Add dram.cc to sconscript src/mem/physical.cc: src/mem/physical.hh: Add params struct to physical memory, use params, make latency function be virtual src/python/m5/objects/PhysicalMemory.py: Add DRAMMemory python class --HG-- extra : convert_revision : 5bd9f2e071c62da89e8efa46fa016f342c01535d
2006-08-16Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head --HG-- extra : convert_revision : 3bf1742201e61d61a906d057b52dc158aa7be2d0
2006-08-16More regression updates.Steve Reinhardt
Get rid of caches in simple-timing config for now. tests/SConscript: another line for diff to ignore tests/configs/simple-timing.py: turn off caches for now tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt: tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout: tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt: tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout: update for inst/tick rate (old one was debug?) tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout: works now (no caches) --HG-- extra : convert_revision : 472030f63297346976db6274a78235c93d4eef8e
2006-08-16Add in checkpointing in the frontend, so that when a checkpoint is called, ↵Lisa Hsu
the python handles it, and the simulation continues. Also, make it so that the cycle number is part of the cpt dir name, so that multiple checkpoints do not overwrite each other. --HG-- extra : convert_revision : a55e4ac20da5a57ea8735951b9070960b9b8298f
2006-08-16Minor regression fixes.Steve Reinhardt
src/python/m5/objects/BaseCPU.py: bug fix tests/SConscript: fix up diff ignore strings to reflect changes in m5 output --HG-- extra : convert_revision : b8e4acee34599ddd431b69fc9d40b6f6e440d128
2006-08-16AUTHORS:Korey Sewell
fix 'reorganization' typo and added o3cpu multiple isa support to list AUTHORS: fix 'reorganization' typo and added o3cpu multiple isa support to list --HG-- extra : convert_revision : cd5d0ba69b37add0f10135e5772a57a7aacdf06e
2006-08-16Tweak my author listRon Dreslinski
--HG-- extra : convert_revision : ab79756d1c7fb4f8bfde86ef396597856a7ceb54
2006-08-16Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem --HG-- extra : convert_revision : 659f84c883b9992ae48f26c837983b9f8fcf18ab
2006-08-16Fixes for Kevins O3 model to work with the blocking caches.Ron Dreslinski
src/cpu/o3/fetch_impl.hh: Fix ordering so dereference works src/cpu/o3/lsq_impl.hh: Check to make sure we didn't squash already src/cpu/o3/lsq_unit.hh: Fix for counting squashed retrys in the WB count src/cpu/o3/lsq_unit_impl.hh: Make sure to set retryID for stores, and clear it appropriately --HG-- extra : convert_revision : 689765a1baea7b36f13eb177d65e97b52b6da09f
2006-08-16Fixes for blocking in the caches that needed to be pulledRon Dreslinski
src/mem/cache/base_cache.cc: Add in retry path for blocking with multi-level caches src/mem/cache/base_cache.hh: Pull more of the blocking fixes into head src/mem/packet.hh: Fix typo --HG-- extra : convert_revision : d4d149adfa414136ebd2c4789b739bb065710f7a
2006-08-16Add ppls contributions from looking at Authors header... Probably missed ↵Ali Saidi
stuff so look it over. Merge zizzer:/bk/newmem into zeep.pool:/z/saidi/tmp/m5.newmem AUTHORS: merge kevin's changes in --HG-- extra : convert_revision : 86344b6d89d90ec7002584d48736e29a9a3c72e5
2006-08-16I threw together the authors file from looking at the Authors of files.Ali Saidi
Feel free to change as you see fit AUTHORS: I threw together the authors file from looking at the Authors of files --HG-- extra : convert_revision : c13b52c60bbc429b29c64b5bebf5bf4971274a8d
2006-08-16Merge ksewell@zizzer:/bk/newmemKorey Sewell
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-o3 --HG-- extra : convert_revision : 8b6f649623cecec0964cff6fce6f4e6a041ae9a1
2006-08-16AUTHORS:Korey Sewell
add in contributions AUTHORS: add in contributions --HG-- extra : convert_revision : 93b5a74d3ab35cdba1d0c12b04e5cb27e5906b11
2006-08-16Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem --HG-- extra : convert_revision : 9eb38f53b5cab92e53a832d0e24e74ef68210abf
2006-08-16Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-newtests --HG-- extra : convert_revision : ab7e77844985372cc69899066fb26bee864598d2
2006-08-16Add in contributions.Kevin Lim
--HG-- extra : convert_revision : 2f71f772f8fba536aa2d8f2beb6039b3fda9bbfc
2006-08-16Update reference outputsSteve Reinhardt
--HG-- extra : convert_revision : df9cf835e0910df1e8e80152825fde9327d4aadb
2006-08-16Finish test clean-up & reorg.Steve Reinhardt
configs/common/FSConfig.py: Add default Machine() param configs/example/fs.py: configs/example/se.py: make it work again src/python/m5/objects/BaseCPU.py: Make mem PhysicalMemory so that a Parent.any proxy works well src/sim/process.cc: Increase default stack size so we don't get an 'increasing stack' message on 'hello world' tests/SConscript: Add full list of current configs. tests/configs/simple-atomic.py: tests/configs/simple-timing.py: don't need SEConfig anymore tests/quick/00.hello/test.py: tests/quick/20.eio-short/test.py: fix tests/run.py: move configs to separate dir --HG-- rename : configs/test/fs.py => configs/example/fs.py rename : configs/test/test.py => configs/example/se.py rename : tests/simple-atomic.py => tests/configs/simple-atomic.py rename : tests/simple-timing.py => tests/configs/simple-timing.py rename : tests/linux-mpboot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini rename : tests/linux-mpboot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out rename : tests/linux-mpboot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console rename : tests/linux-mpboot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt rename : tests/linux-mpboot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr rename : tests/linux-mpboot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout rename : tests/linux-boot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini rename : tests/linux-boot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out rename : tests/linux-boot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console rename : tests/linux-boot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt rename : tests/linux-boot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr rename : tests/linux-boot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout rename : tests/linux-mpboot/ref/alpha/timing/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini rename : tests/linux-mpboot/ref/alpha/timing/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out rename : tests/linux-mpboot/ref/alpha/timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console rename : tests/linux-mpboot/ref/alpha/timing/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt rename : tests/linux-mpboot/ref/alpha/timing/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr rename : tests/linux-mpboot/ref/alpha/timing/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout rename : tests/test-progs/hello/bin/mips/linux/hello_mips => tests/test-progs/hello/bin/mips/linux/hello rename : tests/test-progs/hello/bin/sparc/bin => tests/test-progs/hello/bin/sparc/linux/hello extra : convert_revision : d68ee6d7eefa7ba57370f3fb3c3589f86a6ea6b4
2006-08-16Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-newtests --HG-- extra : convert_revision : 8b4b1529fc20d6fa94cb6e2bd5ff25c984e722f5
2006-08-16Added the SPARC ISA as a contribution.Gabe Black
--HG-- extra : convert_revision : 74b061a14436425b2ac475bb498d71105bfa8e01
2006-08-16AUTHORS:Lisa Hsu
author file contribution AUTHORS: author file contribution --HG-- extra : convert_revision : f4a08695fb4bf37df6144529c5791c75c11a0515
2006-08-16More restructuring of regression tests.Steve Reinhardt
Moving work back to zizzer... configs/common/FSConfig.py: configs/test/fs.py: Move CPU connections out of makeLinuxAlphaSystem() src/python/m5/objects/BaseCPU.py: Create default TLBs in full system. Move utility cache functions here. src/python/m5/objects/O3CPU.py: Add _mem_ports tests/run.py: Add binpath() Change maxtick default to 'forever' tests/simple-atomic.py: Use connectmemPorts() tests/simple-timing.py: Fix up. --HG-- rename : tests/quick/eio1/ref/alpha/eio/detailed/config.ini => tests/quick/20.eio-short/ref/alpha/eio/detailed/config.ini rename : tests/quick/eio1/ref/alpha/eio/detailed/config.out => tests/quick/20.eio-short/ref/alpha/eio/detailed/config.out rename : tests/quick/eio1/ref/alpha/eio/detailed/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/detailed/m5stats.txt rename : tests/quick/eio1/ref/alpha/eio/detailed/stderr => tests/quick/20.eio-short/ref/alpha/eio/detailed/stderr rename : tests/quick/eio1/ref/alpha/eio/detailed/stdout => tests/quick/20.eio-short/ref/alpha/eio/detailed/stdout rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/config.ini => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/config.out => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stderr rename : tests/quick/eio1/ref/alpha/eio/simple-atomic/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout rename : tests/quick/eio1/ref/alpha/eio/simple-timing/config.ini => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini rename : tests/quick/eio1/ref/alpha/eio/simple-timing/config.out => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out rename : tests/quick/eio1/ref/alpha/eio/simple-timing/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt rename : tests/quick/eio1/ref/alpha/eio/simple-timing/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr rename : tests/quick/eio1/ref/alpha/eio/simple-timing/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout rename : tests/quick/eio1/test.py => tests/quick/20.eio-short/test.py rename : configs/test/hello => tests/test-progs/hello/bin/alpha/linux/hello rename : configs/test/hello_mips => tests/test-progs/hello/bin/mips/linux/hello_mips rename : configs/test/sparc_tests/hello_sparc => tests/test-progs/hello/bin/sparc/bin extra : convert_revision : 1f891392ecc11ffcc3b3182fa673c401c0efc8a5
2006-08-16fix e-mail addr in readmeAli Saidi
--HG-- extra : convert_revision : 2cd6dd468f7c45f09707d311e43168f9b3470ab3
2006-08-16Halfway through setting up new test structure... committing soSteve Reinhardt
O can move to my laptop. tests/SConscript: Start to simplify. --HG-- rename : tests/test1/ref/alpha/detailed/config.ini => tests/quick/eio1/ref/alpha/eio/detailed/config.ini rename : tests/test1/ref/alpha/detailed/config.out => tests/quick/eio1/ref/alpha/eio/detailed/config.out rename : tests/test1/ref/alpha/detailed/m5stats.txt => tests/quick/eio1/ref/alpha/eio/detailed/m5stats.txt rename : tests/test1/ref/alpha/detailed/stderr => tests/quick/eio1/ref/alpha/eio/detailed/stderr rename : tests/test1/ref/alpha/detailed/stdout => tests/quick/eio1/ref/alpha/eio/detailed/stdout rename : tests/test1/ref/alpha/atomic/config.ini => tests/quick/eio1/ref/alpha/eio/simple-atomic/config.ini rename : tests/test1/ref/alpha/atomic/config.out => tests/quick/eio1/ref/alpha/eio/simple-atomic/config.out rename : tests/test1/ref/alpha/atomic/m5stats.txt => tests/quick/eio1/ref/alpha/eio/simple-atomic/m5stats.txt rename : tests/test1/ref/alpha/atomic/stderr => tests/quick/eio1/ref/alpha/eio/simple-atomic/stderr rename : tests/test1/ref/alpha/atomic/stdout => tests/quick/eio1/ref/alpha/eio/simple-atomic/stdout rename : tests/test1/ref/alpha/timing/config.ini => tests/quick/eio1/ref/alpha/eio/simple-timing/config.ini rename : tests/test1/ref/alpha/timing/config.out => tests/quick/eio1/ref/alpha/eio/simple-timing/config.out rename : tests/test1/ref/alpha/timing/m5stats.txt => tests/quick/eio1/ref/alpha/eio/simple-timing/m5stats.txt rename : tests/test1/ref/alpha/timing/stderr => tests/quick/eio1/ref/alpha/eio/simple-timing/stderr rename : tests/test1/ref/alpha/timing/stdout => tests/quick/eio1/ref/alpha/eio/simple-timing/stdout extra : convert_revision : 924d2ee29d2a2709135ff8e5c5822fe47a8a60f6
2006-08-15Tweaks to Ali's changesGabe Black
--HG-- extra : convert_revision : ca2a81dd38012ae780f88cfd6be60f21fb43bb81
2006-08-15implement benchmark selection codeAli Saidi
--HG-- extra : convert_revision : 84632fdad7019e177e61c56ae30ea2f3fdbc0995
2006-08-15Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/tmp/m5.newmem --HG-- extra : convert_revision : d490a68eeabd0da7cd9791e14ca3678ed0fd31e6
2006-08-15fixes for gcc 4.1Ali Saidi
Nate needs to fix sinic builder stuff Gabe needs to verify my fixes to decoder.isa OPT/DEBUG compiles for ALPHA_FS, ALPHA_SE, MIPS_SE, SPARC_SE with this changeset README: Fix the swig version in the readme src/SConscript: remove sinic until nate fixes the builder crap for it src/arch/alpha/system.hh: src/arch/mips/isa/includes.isa: src/arch/sparc/isa/decoder.isa: src/base/stats/visit.cc: src/base/timebuf.hh: src/dev/ide_disk.cc: src/dev/sinic.cc: src/mem/cache/miss/mshr.cc: src/mem/cache/miss/mshr_queue.cc: src/mem/packet.hh: src/mem/request.hh: src/sim/builder.hh: src/sim/system.hh: fixes for gcc 4.1 --HG-- extra : convert_revision : 3775427c0047b282574d4831dd602c96cac3ba17
2006-08-15Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem --HG-- extra : convert_revision : 27bfbce7c674f0628ef53921329c08f31db6ef44
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-02 12:40:21 +0000