Age | Commit message (Collapse) | Author |
|
--HG--
extra : convert_revision : b0f93bd35d767fd3a520a9fed70a71d40b0056db
|
|
--HG--
extra : convert_revision : 40fddc2da0bca98542db0e97fa91092497977d2b
|
|
of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet). Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time. Also worked at making behavior and naming
in System and Process objects more consistent.
arch/alpha/ev5.cc:
Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
Support for ExecContext switching.
CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
Support for ExecContext switching.
Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
Support for ExecContext switching.
Renamed xcvec array to execContexts to be consistent with Process.
--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791
|
|
base/statistics.cc:
Small fix: don't exit early out of dist when nozero is set and a zero val is found.
--HG--
extra : convert_revision : 95ba3328c8a79f05f4c821d99071dba10f013ad6
|
|
--HG--
extra : convert_revision : b7e19ff42ddd9a21571e086c11e143d9290e0e38
|
|
arch/alpha/alpha_memory.hh:
cpu/exec_context.hh:
cpu/pc_event.hh:
Move to non architecture specific MemReq
--HG--
extra : convert_revision : 2445943b6f1c8af86b90cfa9c2f9b1eb4a6a1aa2
|
|
--HG--
extra : convert_revision : 8f2bf5ee56ba4fc7484e6510acd3cb93a17174d3
|
|
--HG--
extra : convert_revision : fbd3d3bbaa539661f63e4f7991b0a6275992d60a
|
|
--HG--
extra : convert_revision : db4330ff1258261d8a07fee2cc0e813839fbb9d6
|
|
--HG--
extra : convert_revision : 27ccea6f1aaf84779fa172ae2e5fa1747957e35c
|
|
change printf to be printed only when something is binned so regression doesn't freak out.
base/statistics.cc:
change printf to be printed only when something is binned so regression doesn't freak out.
--HG--
extra : convert_revision : cb60128fc3ab605aa7e915c7c7512cf93b156c96
|
|
--HG--
extra : convert_revision : ac1087a763d62291ffe9858b10c8af82123a1826
|
|
forgot to doxygen comment binned()
base/statistics.hh:
forgot to doxygen comment binned()
--HG--
extra : convert_revision : 7e414a3291e49b7b92bcbfec18470c3ec8671a35
|
|
--HG--
extra : convert_revision : 64dca52045cab9a08aec2d4d18e9e9dad4ebaa89
|
|
Add simple-events.ini for busses w/do_events=true, as this is all that seems to work at this point.
--HG--
extra : convert_revision : 0c5e64488b8f5860e39fa14b443b6c9bcd16c8bf
|
|
into zizzer.eecs.umich.edu:/y/ehallnor/work/m5
--HG--
extra : convert_revision : 29cabd1c72f81ec89db5556ff9cf0128fe8af034
|
|
Update an assert to reflect the current state of the hierarchy
--HG--
extra : convert_revision : 33ddb05121c7614d12dcbf4b64fc6a8f4b97b0a3
|
|
with a bunch of variants that include this and then just do deltas.
Note how much shorter the files are! It's much easier to see what's going on,
too. For example, is it intentional that uni-hier-compressed does not set
do_data on the L2 (though it does on the L1 & L3)?
Also got rid of a couple of old broken ones (uni-default and uni-perfect-L2).
--HG--
extra : convert_revision : 70a12c06a8deb9b1c59def313b48f69ab62efce2
|
|
--HG--
extra : convert_revision : 8658302b64207390b03f9fe133ad722a1417e022
|
|
--HG--
extra : convert_revision : 070e7eadc64a104c9b176f911b0f05ab999deb47
|
|
Add explicit include of sim/param.hh to .cc files as needed.
cpu/base_cpu.cc:
cpu/exetrace.cc:
dev/etherint.cc:
sim/system.cc:
Add include of sim/param.hh.
sim/sim_object.hh:
Don't need to include sim/param.hh.
--HG--
extra : convert_revision : 8ed13f25c2087680230056ab7abb623e6a7699cf
|
|
--HG--
extra : convert_revision : d14536880d6f55d4304c0bab1fa08a5121bd1846
|
|
--HG--
extra : convert_revision : 438c94c90bfb3caffec461ad2c14b266cdf61494
|
|
Added doxygen comments to inifile.hh.
Updated initest. Some other minor cleanup.
base/inifile.cc:
Add support for '+=' append operation.
Factor common code from IniFile::load() and IniFile::add() into new Section::add().
Rename ConfigTable to SectionTable (more descriptive).
Fix bug in Section::dump().
base/inifile.hh:
Add doxygen comments.
Add support for '+=' append operation.
Factor common code from IniFile::load() and IniFile::add() into new Section::add().
Rename ConfigTable to SectionTable (more descriptive).
test/Makefile:
initest needs cprintf.o now.
test/foo.ini:
Add test of '+=' operator.
test/initest.cc:
Bring this up-to-date. Steal main loop from main.cc so we can test
multiple .ini files and command-line assignments too.
--HG--
extra : convert_revision : 982521677fbf464e93aa93798ff7d9611826f17c
|
|
--HG--
extra : convert_revision : c703dff6f52bd994f95597d824997adb125d3194
|
|
make much sense either.
Also, probe doesn't currently support compressed data, but will as soon as I encapsulate the calls more.
cpu/memtest/memtest.cc:
Change memtest to not do probes on uncacheables.
--HG--
extra : convert_revision : 28ca4f793562e55da75e8b7fc3852bb5b1328ea9
|
|
same - bin printing
statistics.cc:
printing of bins! now all the nice binning functionality is actually useful cuz you can see the data it so nicely took. this prints out only the individual bin values. totals to come.
statistics.hh:
add a binned() function to each stat so that at print time, we can know if it's binned in order to print it right.
base/statistics.hh:
add a binned() function to each stat so that at print time, we can know if it's binned in order to print it right.
base/statistics.cc:
printing of bins! now all the nice binning functionality is actually useful cuz you can see the data it so nicely took. this prints out only the individual bin values. totals to come.
base/statistics.hh:
same - bin printing
--HG--
extra : convert_revision : 09df9aae62b0e522230ee6bedcb51079346735a4
|
|
--HG--
extra : convert_revision : 112a99bde10ea9c56f2390389dd13c024e298331
|
|
fix up some very ambiguous doxygen comments about Formulas
base/statistics.hh:
fix up some very ambiguous comments about Formulas
--HG--
extra : convert_revision : ad8d9579fd1933397590c78111bec7c0d19b0e14
|
|
request when buffering it.
--HG--
extra : convert_revision : f4b7fbd6b8eb3715cac9c7ac41e95b588951ffc4
|
|
--HG--
extra : convert_revision : 4e1cef3aa3f3fbcfb59089298436face195b713f
|
|
Add debug callout for cache probes.
miss_queue.hh, miss_queue.cc, blocking_buffer.hh:
Add support for snooping the write buffer.
cache.cc:
Snoop the Write buffer for writebacks on probes.
--HG--
extra : convert_revision : b183152acae6e802a49ff8b7c2ff02c455b2e02a
|
|
into zazzer.eecs.umich.edu:/z/ehallnor/clean
--HG--
extra : convert_revision : 53e6b239f96abce99a4cdd34ebcc565902435a7c
|
|
transmission. The request stays buffered in the sender, not on the bus like it used to be.
--HG--
extra : convert_revision : f6a486653b7a4912608f921bd4f7ac7f9dfe9093
|
|
specified in the INI and then read inside the simulator.
arch/alpha/isa_desc:
Added new M5FUNC instruction to put allow reading of init_param inside simulator
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/system.cc:
sim/system.hh:
Added support for init_param
--HG--
extra : convert_revision : 8253f0b4239b194d4f04665c9deec1fcdf665c8a
|
|
--HG--
extra : convert_revision : d639282e403cb085c452223a76cec31933a529aa
|
|
change VectorDistProxy name to DistProxy - to be more consistent with other proxy namings.
base/statistics.hh:
change VectorDistProxy name to DistProxy - to be more consistent with other proxy namings.
--HG--
extra : convert_revision : c470c93cf598506be56312db52f6c528c213a149
|
|
--HG--
extra : convert_revision : 1fcdbd9d2efc1e0490716de46c81e94f4b28678b
|
|
Add probe calls to test update probe path.
cpu/memtest/memtest.cc:
Add probe calls to test update probe path.
--HG--
extra : convert_revision : b0fb97b54b6ffce9c575fda680b778da63767b7c
|
|
of the block in memory, the other just reads the most up to date data/writes data wherever it is found.
--HG--
extra : convert_revision : d03776f9b6f181fc543efe54f5628e5338f1df41
|
|
base/statistics.cc:
base/statistics.hh:
Implement a reset for for the statistics package.
This will cause all stats to be set to their default value.
Only the currently enabled bin will be reset.
test/Makefile:
Make tests work again now that we're naming include dirs
explicitly
test/stattest.cc:
test reset
--HG--
extra : convert_revision : 8d21cedf6ee91ed0a2412042ea5cb12f79b90eb3
|
|
base/callback.hh:
Don't remove a callback when it is processed.
Document the callback class
--HG--
extra : convert_revision : 9d15500434fe0e5d623c624aac86976708adf0eb
|
|
This makes testing a bit easier.
arch/alpha/alpha_memory.cc:
cpu/intr_control.cc:
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/alpha_console.cc:
dev/console.cc:
dev/disk_image.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ethertap.cc:
dev/simple_disk.cc:
kern/tru64/tru64_system.cc:
sim/main.cc:
sim/prog.cc:
Need to include builder.hh
sort #includes
sim/sim_object.cc:
sim/sim_object.hh:
Separate the SimObjectBuilder stuff into its own file
--HG--
extra : convert_revision : e8395e0cc6ae1f180f9cd6f100795a1ac44aeed5
|
|
into crampon.eecs.umich.edu:/z/binkertn/research/m5/latest
--HG--
extra : convert_revision : 98fcdc0b893b77230ec69597930a71af227bc490
|
|
Delete: BitKeeper/triggers/post-incoming.regression
--HG--
extra : convert_revision : 48529712a47aa7b72fe666b4cccb290a4fa4812e
|
|
Add data to static memReq and make everything use it.
Add init of numLoads.
cpu/simple_cpu/simple_cpu.cc:
Add data to static memReq and make everything use it.
Add init of numLoads.
--HG--
extra : convert_revision : 47d98aae643c64dff4e5cf1dc770a36434122579
|
|
Nate thought this would be cool, and I started on it, but lost interest.
I'm mostly committing this so bk stops bugging me about it. Nate, don't start
hacking on this until after the ISCA deadline!
--HG--
extra : convert_revision : e0ecc54b118ee99d254e9707b1bba11d4078d7e0
|
|
Mostly vestiges of Dave's long-gone instruction prefetching stuff.
arch/alpha/isa_traits.hh:
Delete unused extractInstructionPrefetchTarget().
base/inifile.cc:
Delete '#if 0' code
cpu/base_cpu.hh:
Delete unused filterThisInstructionPrefetch() function.
cpu/exetrace.hh:
Delete '#if 0' code (obsolete flags).
--HG--
extra : convert_revision : c8317f56ba0a0e568daa785825ee938584987bed
|
|
into crampon.eecs.umich.edu:/z/binkertn/research/m5/latest
--HG--
extra : convert_revision : a07675b26bc39cf082e2f4486998718417d43946
|
|
stale reference to machine.def).
arch/alpha/isa_desc:
Add comment describing store-conditional result code
cpu/exec_context.hh:
update comments
--HG--
extra : convert_revision : ac59e0ad7a9440cb6656617fdf05495b59c68f55
|