gem5 - gem5

Age	Commit message (Expand)	Author
2017-10-05	misc: Rename the (De\|En)codeVarint function _(De\|En)codeVarint32.	Gabe Black
2017-10-05	misc: Fix the indentation in DecodeVarint in util/protolib.py.	Gabe Black
2017-10-04	tlm: Elastic Trace Example with L2 Cache Added	Matthias Jung
2017-09-28	sim-se: Fix mremap for downward growing mmap regions	Rico Amslinger
2017-09-27	arch-x86: fix CondInst decoding for MOV to Control Registers	Bjoern A. Zeeb
2017-09-27	arch: change panic for Vector traceData to warn_once	Bjoern A. Zeeb
2017-09-27	sim: make compile on FreeBSD prior to 11	Bjoern A. Zeeb
2017-09-26	util: Make dot_writer ignore NULL simobjects.	Gabe Black
2017-09-26	dev: Make the IDE controller handle NULL simobject pointers.	Gabe Black
2017-09-26	sim: Add a get_config_as_dict to the NullSimObject class.	Gabe Black
2017-09-26	sim: Don't add the NULL SimObject as a child of other SimObjects.	Gabe Black
2017-09-26	misc: Make the m5 utilities writefile command accept a host path.	Gabe Black
2017-09-26	sim: Give the NullSimObject singleton a _name.	Gabe Black
2017-09-26	sim: Add a NullSimObject.descendants function.	Gabe Black
2017-09-26	sim: Add a clear_parent function to NullSimObject.	Gabe Black
2017-09-26	sim: Check the SimObjectVector.has_parent function to use the "any" function.	Gabe Black
2017-09-26	sim: Only consider non-NULL elements in SimObjectVector.has_parent.	Gabe Black
2017-09-26	sim: Add a set_parent to NullSimObject which does nothing.	Gabe Black
2017-09-25	mem: Fill the new packet ID fields with master IDs when tracing packets.	Gabe Black
2017-09-25	mem: Add a "map" of packet IDs to strings in probe traces.	Gabe Black
2017-09-25	mem: Trace the request master ID in the MemTraceProbe.	Gabe Black
2017-09-25	mem: Record the request master ID in the PacketInfo structure.	Gabe Black
2017-09-25	dev, virtio: Improvements to diod process handling	Anouk Van Laer
2017-09-21	alpha: Move some initialization logic from loadState into unserialize.	Gabe Black
2017-09-21	sim: Stop using loadState in the Root SimObject.	Gabe Black
2017-09-20	kvm: arm: Get rid of functions which just wrap the subclasses version.	Gabe Black
2017-09-11	tlm: Don't set SystemC time resolution	Matthias Jung
2017-09-11	stats: Move the swpipl function into the Alpha kernel stats.	Gabe Black
2017-09-11	stats: Get rid of some kernel stats related cruft.	Gabe Black
2017-09-06	cpu: Fix bi-mode branch predictor thresholds	Rico Amslinger
2017-09-01	cpu-minor: Fix for addr range coverage calculation	Pau Cabre
2017-08-31	scons: bump required python version to 2.7 to support pybind11	Paul Rosenfeld
2017-08-30	arch-arm: Only increment SW PMU counters on writes to PMSWINC	Jose Marinho
2017-08-30	arch-arm: Add missing override keywords in fault.hh	Andreas Sandberg
2017-08-30	arch-x86: Add missing override in the X86 TLB	Andreas Sandberg
2017-08-30	arch-sparc: Add a FaultVals instantiation for VecDisabled	Andreas Sandberg
2017-08-30	arch-alpha: Add missing overrides	Andreas Sandberg
2017-08-30	python: Make GlobalExitEvent.getCode() return an int	Andreas Sandberg
2017-08-30	cpu-o3: fix data pkt initialization for split load	Matthias Hille
2017-08-28	x86: Use the new CondInst format for moves to/from control registers.	Gabe Black
2017-08-28	x86: Add a "CondInst" format for conditionally decoded instructions.	Gabe Black
2017-08-12	dev: Fix an IDE error check.	Gabe Black
2017-08-08	mem-cache: Delete squashed HWPrefetches	Pau Cabre
2017-08-03	configs, arm: Fix incorrect use of mem_range in bL example	Andreas Sandberg
2017-08-03	arm, config: Fix CPU names in ARM example configs	Andreas Sandberg
2017-08-02	base: Give more information when setting up asynchronous IO fails.	Gabe Black
2017-08-01	misc: git ignore file udpated	Éder F. Zulian
2017-08-01	style: Add shared gem5 headers to the style checker	Andreas Sandberg
2017-08-01	util: Move m5op.h to the shared include directory	Andreas Sandberg
2017-08-01	util, m5: Use consistent naming for m5op C symbols	Andreas Sandberg