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2006-03-07Updates for the quiesceEvent that was added to the XC.Kevin Lim
Also several files need to include system.hh or symtab.hh. This is because exec_context.hh has less #includes than before, requiring some of the files that include it to include some other files as well. arch/alpha/faults.cc: Avoid accessing XC directly. arch/alpha/stacktrace.cc: StackTrace needs to include system.hh. cpu/cpu_exec_context.cc: Update for change to CPUExecContext. cpu/cpu_exec_context.hh: Make quiesce events use CPUExecContext instead of ExecContext. Include functions to allow the quiesce event and last activate/suspend be accessed. cpu/exec_context.hh: Include functions for quiesceEvent. cpu/intr_control.cc: Needs to include cpu/exec_context.hh. cpu/profile.cc: Needs to include symtab.hh for the symbol table. cpu/profile.hh: Needs forward declare of ExecContext. cpu/simple/cpu.cc: Rename xc to cpuXC. dev/tsunami_cchip.cc: Needs to include exec_context.hh. kern/kernel_stats.cc: Needs to include system.hh. kern/linux/events.cc: Needs to include system.hh. Also avoid accessing objects directly from the XC. kern/tru64/dump_mbuf.cc: Include symtab.hh for the SymbolTable and system.hh. kern/tru64/tru64_events.cc: Include system.hh sim/pseudo_inst.cc: Avoid accessing objects directly within the XC. --HG-- extra : convert_revision : 78fe30d98cd20f7403fa216f772071458b675c84
2006-03-05Merge ktlim@zizzer:/bk/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/m5-proxyxc Further changes still need to be made to the XC code. arch/alpha/ev5.cc: arch/alpha/freebsd/system.cc: arch/alpha/linux/system.cc: base/remote_gdb.cc: cpu/cpu_exec_context.cc: cpu/cpu_exec_context.hh: cpu/simple/cpu.cc: cpu/simple/cpu.hh: kern/kernel_stats.cc: sim/pseudo_inst.cc: Hand merge. --HG-- rename : kern/freebsd/freebsd_system.cc => arch/alpha/freebsd/system.cc rename : kern/linux/linux_system.cc => arch/alpha/linux/system.cc rename : kern/linux/linux_threadinfo.hh => arch/alpha/linux/threadinfo.hh rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc rename : arch/alpha/alpha_memory.cc => arch/alpha/tlb.cc rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc rename : cpu/exec_context.cc => cpu/cpu_exec_context.cc rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh extra : convert_revision : c1fe71fdd87d1fcd376f4feec69fc3fa29152e3e
2006-03-05Remove call to swap_palshadow that is no longer needed.Kevin Lim
arch/alpha/faults.cc: Remove call to swap_palshadow. --HG-- extra : convert_revision : 10282c11080379fc4e8a166ff35d18d728f0d5a4
2006-03-04Merge ktlim@zizzer:/bk/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs --HG-- extra : convert_revision : 31c1bcc2c52d88bd5133a2007f9feefa2c04b6aa
2006-03-04Merge zizzer:/bk/m5Ali Saidi
into zeep.eecs.umich.edu:/z/saidi/work/m5.head --HG-- extra : convert_revision : faf71f4ed7d97734835fc7cd552e21b356b8d864
2006-03-04Emulated syscalls should return -errno on failureSteve Reinhardt
(not plain errno). Thanks to Jos Delbar. --HG-- extra : convert_revision : bd15ba1c99f25b8560938566d3922734172ab905
2006-03-04Merge zizzer:/bk/m5Ali Saidi
into zeep.eecs.umich.edu:/z/saidi/work/m5.head --HG-- extra : convert_revision : 405920a23690089a02a5b75cfe947885d8749dc4
2006-03-04move alpha specific code into arch/alphaAli Saidi
System -> AlphaSystem SConscript: Move some more files around arch/alpha/freebsd/system.cc: arch/alpha/freebsd/system.hh: System -> AlphaSystem arch/alpha/linux/aligned.hh: arch/alpha/linux/hwrpb.hh: arch/alpha/linux/system.cc: arch/alpha/linux/thread_info.hh: arch/alpha/linux/threadinfo.hh: move alpha specific code into arch/alpha python/m5/objects/System.py: Split off arch specific parts of system into AlphaSystem --HG-- rename : kern/freebsd/freebsd_system.cc => arch/alpha/freebsd/system.cc rename : kern/freebsd/freebsd_system.hh => arch/alpha/freebsd/system.hh rename : kern/linux/aligned.hh => arch/alpha/linux/aligned.hh rename : kern/linux/hwrpb.hh => arch/alpha/linux/hwrpb.hh rename : kern/linux/linux_system.cc => arch/alpha/linux/system.cc rename : kern/linux/linux_system.hh => arch/alpha/linux/system.hh rename : kern/linux/thread_info.hh => arch/alpha/linux/thread_info.hh rename : kern/linux/linux_threadinfo.hh => arch/alpha/linux/threadinfo.hh rename : kern/tru64/tru64_system.cc => arch/alpha/tru64/system.cc rename : kern/tru64/tru64_system.hh => arch/alpha/tru64/system.hh extra : convert_revision : 1c496efb823326a4b629574bd9b5f30e99a0aa40
2006-03-04Merge ktlim@zizzer:/bk/m5Kevin Lim
into zizzer.eecs.umich.edu:/.automount/zamp/z/ktlim2/m5-shadowregs --HG-- extra : convert_revision : 570b1c4331075587a866dfada7fbe51805cdcad4
2006-03-04Steps towards setting up the infrastructure to allow the new CPU model to ↵Kevin Lim
work in full system mode. The major change is renaming the old ExecContext to CPUExecContext, and creating two new classes, ExecContext (an abstract class), and ProxyExecContext (a templated class that derives from ExecContext). Code outside of the CPU continues to use ExecContext as normal (other than not being able to access variables within the XC). The CPU uses the CPUExecContext, or however else it stores its own state. It then creates a ProxyExecContext, templated on the class used to hold its state. This proxy is passed to any code outside of the CPU that needs to access the XC. This allows code outside of the CPU to use the ExecContext interface to access any state needed, without knowledge of how that state is laid out. Note that these changes will not compile without the accompanying revision to automatically rename the shadow registers. SConscript: Include new file, cpu_exec_context.cc. arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_memory.cc: arch/alpha/alpha_tru64_process.cc: arch/alpha/arguments.cc: arch/alpha/isa/decoder.isa: arch/alpha/stacktrace.cc: arch/alpha/vtophys.cc: base/remote_gdb.cc: cpu/intr_control.cc: Avoid directly accessing objects within the XC. arch/alpha/ev5.cc: Avoid directly accessing objects within the XC. KernelStats have been moved to the BaseCPU instead of the XC. arch/alpha/isa_traits.hh: Remove clearIprs(). It wasn't used very often and it did not work well with the proxy ExecContext. cpu/base.cc: Place kernel stats within the BaseCPU instead of the ExecContext. For now comment out the profiling code sampling until its exact location is decided upon. cpu/base.hh: Kernel stats are now in the BaseCPU instead of the ExecContext. cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: cpu/memtest/memtest.cc: cpu/memtest/memtest.hh: Changes to support rename of old ExecContext to CPUExecContext. See changeset for more details. cpu/exetrace.cc: Remove unneeded include of exec_context.hh. cpu/intr_control.hh: cpu/o3/alpha_cpu_builder.cc: Remove unneeded include of exec_context.hh cpu/o3/alpha_cpu.hh: cpu/o3/alpha_cpu_impl.hh: cpu/o3/cpu.cc: cpu/o3/cpu.hh: cpu/simple/cpu.cc: cpu/simple/cpu.hh: Changes to support rename of old ExecContext to CPUExecContext. See changeset for more details. Also avoid accessing anything directly from the XC. cpu/pc_event.cc: Avoid accessing objects directly from the XC. dev/tsunami_cchip.cc: Avoid accessing objects directly within the XC> kern/freebsd/freebsd_system.cc: kern/linux/linux_system.cc: kern/linux/linux_threadinfo.hh: kern/tru64/dump_mbuf.cc: kern/tru64/tru64.hh: kern/tru64/tru64_events.cc: sim/syscall_emul.cc: sim/syscall_emul.hh: Avoid accessing objects directly within the XC. kern/kernel_stats.cc: kern/kernel_stats.hh: Kernel stats no longer exist within the XC. kern/system_events.cc: Avoid accessing objects directly within the XC. Also kernel stats are now in the BaseCPU. sim/process.cc: sim/process.hh: Avoid accessing regs directly within an ExecContext. Instead use a CPUExecContext to initialize the registers and copy them over. cpu/cpu_exec_context.cc: Rename old ExecContext to CPUExecContext. This is used by the old CPU models to store any necessary architectural state. Also include the ProxyExecContext, which is used to access the CPUExecContext's state in code outside of the CPU. cpu/cpu_exec_context.hh: Rename old ExecContext to CPUExecContext. This is used by the old CPU models to store any necessary architectural state. Also include the ProxyExecContext, which is used to access the CPUExecContext's state in code outside of the CPU. Remove kernel stats from the ExecContext. sim/pseudo_inst.cc: Kernel stats now live within the CPU. Avoid accessing objects directly within the XC. --HG-- rename : cpu/exec_context.cc => cpu/cpu_exec_context.cc rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh extra : convert_revision : a75393a8945c80cca225b5e9d9c22a16609efb85
2006-03-04properly align the uid and size fields in the pre_F54_stat structure.Ali Saidi
Patch from Jos Delbar, modified to use variable attributes. --HG-- extra : convert_revision : 12c9ebbb109a789dd4230b7606b1f8ded00c21fc
2006-03-04Merge ktlim@zizzer:/bk/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs arch/alpha/ev5.cc: Remove intr_post, it is no longer used. arch/alpha/isa_traits.hh: Hand merge. --HG-- extra : convert_revision : 94f14539a9e5646f8c368b15b2dff18ab2f492cf
2006-03-04we REALLY don't want to use system headers for libelf...Ali Saidi
use "" not <> targetarch->arch arch/alpha/system.cc: targetarch -> arch base/loader/elf_object.cc: we REALLY don't want to use system headers for libelf... use "" not <> --HG-- extra : convert_revision : d0e1672dc655dca3081e36b2158e7b19ef54af40
2006-03-04Merge gblack@m5.eecs.umich.edu:/bk/multiarchGabe Black
into ewok.(none):/home/gblack/m5/multiarch --HG-- extra : convert_revision : cb6de8d050ac5abb8f61eb5780deeb06e93b1a0c
2006-03-04General small SPARC fixupsGabe Black
arch/sparc/SConscript: Fixed up the SPARC SConscript to use the name of the SPARC source files. arch/sparc/linux_process.cc: Changed the namespace name from SPARCISA to SparcISA. --HG-- extra : convert_revision : c340fbf78200bf7d962e7578a3f2998860224c53
2006-03-04Removed the commented out declaration of the Addr type.Gabe Black
--HG-- extra : convert_revision : 70612a3efc877febbff0c8fb9065dea7e1d12cd8
2006-03-04Filled out the object file loader so it can load object files for several ↵Gabe Black
OSs and architectures. SConscript: Added ./libelf as an include search directory. There might be a better spot for this than where I put it. arch/SConscript: Combined the linux_process.h and tru64_process.h into process.h. This allows each ISA to support processes from arbitrary OSs. arch/alpha/SConscript: Added process.cc as a source file. It provides an implementation of createProcess, which takes an object_file object and creates the appropriate process object, or dies. base/loader/elf_object.cc: Actually extract the OS and architecture from the elf file, rather than always guessing Alpha and Linux. base/loader/object_file.hh: Added constants for SPARC, MIPS, and Solaris, and changed the include for the Addr type. sim/process.cc: Pushed creation of specific process objects into the ISA specific code. --HG-- extra : convert_revision : b4754e7ca8328672d07e1394c4d162e199606b53
2006-03-03Merge ktlim@zizzer:/bk/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs --HG-- extra : convert_revision : 979ab1fc4e1ea4d6a78ac9a2ec894f0be4feb01d
2006-03-03Remove intr_post function. No longer being used.Kevin Lim
--HG-- extra : convert_revision : 1dc1d691244fd2edbd21d5cbf0764622d8f95fbb
2006-03-03Changes to support automatic renaming of the shadow registers at decode ↵Kevin Lim
time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. The shadow registers are folded into the normal integer registers to ease renaming indexing. Include the removed Opcdec class of instructions for faulting when a pal mode only instruction is decoded in non-pal mode. arch/alpha/ev5.cc: Changes to automatically map the shadow registers if the instruction is in PAL mode. arch/alpha/isa/branch.isa: arch/alpha/isa/decoder.isa: arch/alpha/isa/fp.isa: arch/alpha/isa/int.isa: arch/alpha/isa/mem.isa: arch/alpha/isa/pal.isa: arch/alpha/isa/unimp.isa: Changes for automatically using the shadow registers. Now instructions must decode based on an ExtMachInst, which is a MachInst with any decode context information concatenated onto the higher order bits. arch/alpha/isa/main.isa: Changes for automatically using the shadow registers. Now instructions must decode based on an ExtMachInst, which is a MachInst with any decode context information concatenated onto the higher order bits. The decoder (for Alpha) uses the 32nd bit in order to determine if the machine is in PAL mode. If it is, then it refers to the reg_redir table to determine the true index of the register it is using. Also include the opcdec instruction definition. arch/alpha/isa_traits.hh: Define ExtMachInst type that is used by the static inst in order to decode the instruction, given the context of being in pal mode or not. Redefine the number of Int registers, splitting it into NumIntArchRegs (32) and NumIntRegs (32 + 8 shadow registers). Change the dependence tags to reflect the integer registers include the 8 shadow registers. Define function to make an ExtMachInst. Currently it is somewhat specific to Alpha; in the future it must be decided to make this more generic and possibly slower, or leave it specific to each architecture and ifdef it within the CPU. arch/isa_parser.py: Have static insts decode on the ExtMachInst. base/remote_gdb.cc: Support the automatic remapping of shadow registers. Remote GDB must now look at the PC being read in order to tell if it should use the normal register indices or the shadow register indices. cpu/o3/regfile.hh: Comment out the pal registers; they are now a part of the integer registers. cpu/simple/cpu.cc: Create an ExtMachInst to decode on, based on the normal MachInst and the PC of the instructoin. cpu/static_inst.hh: Change from MachInst to ExtMachInst to support shadow register renaming. --HG-- extra : convert_revision : 1d23eabf735e297068e1917445a6348e9f8c88d5
2006-03-03Merge zizzer:/bk/m5Ali Saidi
into zeep.eecs.umich.edu:/z/saidi/work/m5.head --HG-- extra : convert_revision : 8f463682e32a457cd9171c63dcec5209cb850b56
2006-03-03First cut at moving alpha specefic stuff out of /sim/system* intoAli Saidi
arch/alpha/system*. SConscript: dev/alpha_console.cc: dev/alpha_console.hh: kern/freebsd/freebsd_system.cc: kern/freebsd/freebsd_system.hh: kern/kernel_stats.cc: kern/linux/linux_system.cc: kern/linux/linux_system.hh: kern/tru64/tru64_system.cc: kern/tru64/tru64_system.hh: sim/pseudo_inst.cc: sim/system.cc: sim/system.hh: First cut at moving alpha specefic stuff out of /sim/system* --HG-- extra : convert_revision : eba58f537fc04e605af4fc216e184b074a44c8a0
2006-03-03Ethernet devices have an RSS option to tell the driver toNathan Binkert
use Receive side scaling dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/sinic.cc: dev/sinic.hh: dev/sinicreg.hh: add support for setting the RSS flag to notify the driver to use RSS --HG-- extra : convert_revision : 5f0c11668ae976634b3bf0caad669a9464a4c041
2006-03-02Merge gblack@m5.eecs.umich.edu:/bk/multiarchGabe Black
into ewok.(none):/home/gblack/m5/multiarch --HG-- extra : convert_revision : f6db244a66431dd6b8c5ba251ed02d76cd509cff
2006-03-02Fix fault handling, dereferincing a null pointer is bad.Ali Saidi
--HG-- extra : convert_revision : a4f658bfd39b7f1d219ad8929b8f45457f49299f
2006-03-01Got rid of the multiple inheritance in the Fault classes, and the base ↵Gabe Black
MachineCheck and Alignment faults. --HG-- extra : convert_revision : 4b1429ef5c7a11c25e28f2bc868cc1481a08c5d1
2006-03-01Merge zizzer:/bk/m5Ali Saidi
into zeep.eecs.umich.edu:/z/saidi/work/m5.q --HG-- extra : convert_revision : 4855ecfb3de652456a8be413c9e538c91709dcb6
2006-03-01Begain setting up syscall emulation for sparc linux.Gabe Black
arch/sparc/linux_process.cc: Began modifying this file for sparc, and replaced the alpha syscall numbers with the sparc ones. arch/sparc/linux_process.hh: Begain modifying this file for sparc. --HG-- extra : convert_revision : b1ed8ac50a35591521c5feaf1ea9c4b8ccc26dc8
2006-03-01Cleaned up some of the Fault system.Gabe Black
arch/alpha/ev5.cc: Commented out the intr_post function since it's not used. If this really -is- needed, it should be moved into the fault class. arch/alpha/faults.cc: arch/alpha/faults.hh: Moved the fault invocation code into the fault class fully, and got rid of the need for isA. cpu/exec_context.cc: cpu/exec_context.hh: Removed the trap function from the ExecContext. The faults will execute normally in full system mode, but always panic in syscall emulation mode. cpu/ozone/cpu.hh: cpu/simple/cpu.hh: Changed the execution context executing a fault to a fault executing on the execution context. sim/faults.cc: If not in full system mode, trying to invoke a fault causes a panic. sim/faults.hh: Removed the isA function. --HG-- extra : convert_revision : 894dc8f0755c8efc4b7ef5a09fb2cf7373042395
2006-03-01Removed the targetarch code.Gabe Black
--HG-- extra : convert_revision : ab0c8ed2e8d7359b353f34b443e84094ca40c5e6
2006-03-01Made sparc copies of some architecture specific files.Gabe Black
arch/sparc/linux_process.cc: arch/sparc/linux_process.hh: Formatting & doxygen. arch/sparc/linux_process.cc: Added some more ioctl commands to ignore. Set unlink and rename to the new functions. Ignore setrlimit, times and rt_sigaction. Should eventually provide a function for times. arch/sparc/linux_process.cc: Fixes for Linux emulation: - stat struct alignment - osf_{get,set}sysinfo return values - additional syscall numbers - initialize $r0 to 0 arch/sparc/linux_process.cc: arch/sparc/linux_process.hh: Updated Copyright arch/sparc/linux_process.cc: Alphabetize includes. arch/sparc/linux_process.cc: Changed all syscalls to use syscall return object arch/sparc/linux_process.cc: Removed unecessary constructor call at each return. arch/sparc/linux_process.cc: Rename sim/universe.{cc,hh} to root.{cc,hh}. arch/sparc/linux_process.cc: shuffle files around for new directory structure arch/sparc/linux_process.cc: Remove RCS Id string arch/sparc/linux_process.cc: arch/sparc/linux_process.hh: Update copyright dates and author list arch/sparc/linux_process.hh: remove $Id$ string arch/sparc/linux_process.cc: Apply patch for syscall emulation provided by Antti Miettinen (apm@brigitte.dna.fi). arch/sparc/linux_process.cc: Added the endianness namespace. This may change. arch/sparc/linux_process.cc: Replaced the namespace declaration with including arch/alpha/isa_traits.hh arch/sparc/linux_process.cc: fixup for bsd hosts. Some headers are included by default which means that more variables need TGT_ prefixes and there isn't a stat call (everything is a stat64 call) so we have to work around that a bit arch/sparc/linux_process.cc: Add endian conversions to fstat arch/sparc/linux_process.cc: fix #if. I wonder why my compiler had no issues arch/sparc/linux_process.cc: add endian conversions for fstat functions arch/sparc/linux_process.cc: move architecture independent code into kern/linux/linux.(hh|cc) arch/sparc/linux_process.hh: Add getDesc function arch/sparc/linux_process.cc: Added using directive for AlphaISA namespace arch/sparc/linux_process.cc: Add pipeFunc. arch/alpha/linux_process.cc: Renamed arch files to remove alpha prefix, and changed alpha_memory.hh and cc to a more accurate tlb.hh and cc arch/sparc/linux_process.cc: bk cp ../alpha/linux_process.cc linux_process.cc arch/sparc/linux_process.hh: bk cp ../alpha/linux_process.hh linux_process.hh --HG-- extra : convert_revision : a8eca1c5f848383263a2326b0e3cde4bcd85f14b
2006-03-01Changed the name of the fault's invocation method from ev5_trap to invoke.Gabe Black
--HG-- extra : convert_revision : b7ab14ac644f6a38c69aaa5372b3002b21f34af0
2006-03-01Used the Fault constructor to create Interrupt faults. Using the pointer ↵Gabe Black
directly prevents reference counting from working correctly. cpu/simple/cpu.cc: Used the Fault constructor to create an Interrupt fault. --HG-- extra : convert_revision : ec2ef7e3cd04ee9a44628877dc6e770fb907104b
2006-03-01moved ev5_trap fully into the fault class.Gabe Black
--HG-- extra : convert_revision : 182cdec9a4e05f55edff0c6a114844b9ad2ca8db
2006-02-28Add quiesceNs, quiesceTime, quiesceCycles, and m5panic pseudo ops.Ali Saidi
This changeset removes a check that prevents quiescing when an interrupt is pending. *** You should only call quiesce if that isn't a problem. *** arch/alpha/isa/decoder.isa: sim/pseudo_inst.cc: sim/pseudo_inst.hh: Add quiesceNs, quiesceCycles, quisceTime and m5panic pseudo ops. These quiesce for a number of ns, cycles, report how long we were quiesced for, and panic the simulator respectively. The latter is added to the panic() function in the console and linux kernel instead of executing an infinite loop until someone notices. cpu/exec_context.cc: cpu/exec_context.hh: Add a quiesce end event to the execution contexted which upon executing wakes up a CPU for quiesceCycles/quiesceNs. util/m5/Makefile: Make the makefile more reasonable util/m5/m5.c: update the m5op executable to use the files from the linux tree util/m5/m5op.S: update m5op.S from linux tree util/m5/m5op.h: update m5op.h from linux tree --HG-- rename : util/m5/m5op.s => util/m5/m5op.S extra : convert_revision : 3be18525e811405b112e33f24a8c4e772d15462d
2006-02-28Merge ktlim@zizzer:/bk/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/m5-clean arch/alpha/ev5.cc: cpu/o3/regfile.hh: Hand merge. --HG-- rename : arch/alpha/alpha_memory.cc => arch/alpha/tlb.cc extra : convert_revision : c941dd2198851398820b38a66471372ed8454891
2006-02-28Corrected some mistakes in the hand mergeGabe Black
--HG-- extra : convert_revision : 84d852e625f754c4414403e8c3e26bda80500d4f
2006-02-28Hand mergedGabe Black
--HG-- extra : convert_revision : 0fd5ecbba5dc6299dd046926ec27595ca4d97ee7
2006-02-28Merge gblack@m5.eecs.umich.edu:/bk/multiarchGabe Black
into ewok.(none):/home/gblack/m5/multiarch --HG-- extra : convert_revision : 0b3ffc0605c9043d7f5bf6c15f4a3c68846a732a
2006-02-28Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Gabe Black
into zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch --HG-- extra : convert_revision : 3a3ff8fcf472db385219a00ae434d1f3fea43b18
2006-02-28Cleaned up and slightly reorganized the Fault class heirarchy.Gabe Black
arch/alpha/ev5.cc: Changed c style casts of Faults to dynamic_casts arch/alpha/faults.cc: AlphaFault is now an abstract class. arch/alpha/faults.hh: AlphaFault is now an abstract class. Also, AlphaMachineCheckFault and AlphaAlignmentFault multiply inherit from both AlphaFault and from MachineCheckFault and AlignmentFault respectively. These classes get their name from the generic classes. cpu/o3/alpha_cpu_impl.hh: Changed a c style cast to a dynamic_cast for a Fault sim/faults.hh: All generic Fault classes are now abstract. Also, MachineCheckFault and AlignmentFault inherit FaultBase as a virtual base class to help resolve ambiguities when they are multiply inherited in ISA specific classes. The override the isMachineCheckFault and isAlignmentFault functions appropriately, and provide a standard name for these faults. --HG-- extra : convert_revision : 2cb906708e3eaec4a12587484c09e50ed6ef88fc
2006-02-27Changed ev5_trap from a function of the execution context to a function of ↵Gabe Black
the fault. The actual function still resides in the execution context. --HG-- extra : convert_revision : 56e33536cdd9079ace03896b85ea3c84b6eb4e57
2006-02-27Moved the _stat for MachineCheckFault and AlignmentFault into the isa ↵Gabe Black
specific classes to prevent instantiation of the generic classes. --HG-- extra : convert_revision : 0378261342df008c2bf6d260295ef21b15f119a8
2006-02-27Got rid of the fault_addr function.Gabe Black
--HG-- extra : convert_revision : deb54cd82db47abb6d9bac76e072f2a4b1c883b2
2006-02-27Merge ktlim@zizzer:/bk/m5Kevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/m5-clean --HG-- extra : convert_revision : 97c345f0715a347ce34f9cabd994485f30f2e171
2006-02-27Changes to put all the misc regs within the misc reg file. This includes ↵Kevin Lim
the FPCR, Uniq, lock flag, lock addr, and IPRs. They are now accessed by calling readMiscReg()/setMiscReg() on the XC. Old IPR accesses are supported by using readMiscRegWithEffect() and setMiscRegWithEffect() (names may change in the future). arch/alpha/alpha_memory.cc: Change accesses to IPR to go through the XC. arch/alpha/ev5.cc: Change accesses for IPRs to go through the misc regs. arch/alpha/isa/decoder.isa: Change accesses to IPRs to go through the misc regs. readIpr() and setIpr() are now changed to calls to readMiscRegWithEffect() and setMiscRegWithEffect(). arch/alpha/isa/fp.isa: Change accesses to IPRs and Fpcr to go through the misc regs. arch/alpha/isa/main.isa: Add support for all misc regs being accessed through readMiscReg() and setMiscReg(). Instead of readUniq and readFpcr, they are replaced by calls with Uniq_DepTag and Fpcr_DepTag passed in as the register index. arch/alpha/isa_traits.hh: Change the MiscRegFile to a class that handles all accesses to MiscRegs, which in Alpha include the FPCR, Uniq, Lock Addr, Lock Flag, and IPRs. Two flavors of accesses are supported: normal register reads/writes, and reads/writes with effect. The latter are basically the original read/write IPR functions, while the former are normal reads/writes. The lock flag and lock addr registers are added to the dependence tags in order to support being accessed through the misc regs. arch/alpha/stacktrace.cc: cpu/simple/cpu.cc: dev/sinic.cc: Change accesses to the IPRs to go through the XC. arch/alpha/vtophys.cc: Change access to the IPR to go through the XC. arch/isa_parser.py: Change generation of code for control registers to use the readMiscReg and setMiscReg functions. base/remote_gdb.cc: Change accesses to the IPR to go through the XC. cpu/exec_context.hh: Use the miscRegs to access the lock addr, lock flag, and other misc registers. cpu/o3/alpha_cpu.hh: cpu/simple/cpu.hh: Support interface for reading and writing misc registers, which replaces readUniq, readFpcr, readIpr, and their set functions. cpu/o3/alpha_cpu_impl.hh: Change accesses to the IPRs to go through the miscRegs. For now comment out some of the accesses to the misc regs until the proxy exec context is completed. cpu/o3/alpha_dyn_inst.hh: Change accesses to misc regs to use readMiscReg and setMiscReg. cpu/o3/alpha_dyn_inst_impl.hh: Remove old misc reg accessors. cpu/o3/cpu.cc: Comment out old misc reg accesses until the proxy exec context is completed. cpu/o3/cpu.hh: Change accesses to the misc regs. cpu/o3/regfile.hh: Remove old access methods for the misc regs, replace them with readMiscReg and setMiscReg. They are dummy functions for now until the proxy exec context is completed. kern/kernel_stats.cc: kern/system_events.cc: Have accesses to the IPRs go through the XC. kern/tru64/tru64.hh: Have accesses to the misc regs use the new access methods. --HG-- extra : convert_revision : e32e0a3fe99522e17294bbe106ff5591cb1a9d76
2006-02-27Renamed arch files to remove alpha prefix, and changed alpha_memory.hh and ↵Gabe Black
cc to a more accurate tlb.hh and cc --HG-- rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh rename : arch/alpha/alpha_memory.cc => arch/alpha/tlb.cc rename : arch/alpha/alpha_memory.hh => arch/alpha/tlb.hh rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh extra : convert_revision : 9fe6863cc37347d2a6bd716c529b0a4a50b36ea7
2006-02-27Changed targetarch to just arch.Gabe Black
SConscript: Changed all of the "targetarch" files to be "arch" files arch/SConscript: Added all of the remaining targetarch files to isa_switch_hdrs --HG-- extra : convert_revision : a37d18349e27cf92dce12814f21944daa7fe9480
2006-02-27Fixed up some include paths.Gabe Black
kern/kernel_stats.cc: Replaced targetarch with arch/alpha, since osfpal.hh is not a targetarched file. --HG-- extra : convert_revision : 24a25f27e5912cb949568cf5fd0ab856771ba0d1
2006-02-27Added isMachineCheckFault and isAlignmentFault virtual functions to the ↵Gabe Black
fault base class, and replaced the isA templated function with them where appropriate. arch/alpha/ev5.cc: cpu/simple/cpu.cc: Changed from the isA templated function to isMachineCheckFault and isAlignmentFault sim/faults.hh: Added isMachineCheckFault and isAlignmentFault virtual functions to the fault base class. --HG-- extra : convert_revision : 3bf3a4369bc24a039648ee4f2a9c1663362ff2e2
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 02:11:31 +0000