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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
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tree
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Author
2006-11-04
fixes so that M5 will compile under solaris
Ali Saidi
2006-11-01
Merge zizzer:/bk/newmem
Lisa Hsu
2006-11-01
factor some more commone code and enable going from checkpoint into arbitrary...
Lisa Hsu
2006-11-01
Merge zizzer.eecs.umich.edu:/bk/newmem/
Gabe Black
2006-11-01
Added code to handle draining.
Gabe Black
2006-11-01
Fix a range check on the ipr_index.
Gabe Black
2006-11-01
Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...
Gabe Black
2006-11-01
make it so that you can do a standard switch without the caches option. this...
Lisa Hsu
2006-11-01
change name of 2nd switch_cpu so that ckpt recovery with multiple cpus doens'...
Lisa Hsu
2006-10-31
Arg!
Gabe Black
2006-10-31
More typos! I need to get nfs to work.
Gabe Black
2006-10-31
Fix another typo
Gabe Black
2006-10-31
Check for out of range IPR values as well.
Gabe Black
2006-10-31
Fix stupid typo
Gabe Black
2006-10-31
Make two simple utility functions to determine if a MiscReg index correspondi...
Gabe Black
2006-10-31
Forgot to add intr_flag in one place.
Gabe Black
2006-10-31
We don't include ipr.cc in SE builds, so don't call it.
Gabe Black
2006-10-31
Made the old name refer to the miscreg index to prevent having to change code...
Gabe Black
2006-10-31
Forgot to change the index.
Gabe Black
2006-10-31
Make the IPRs use regular miscreg indexes, and make a table or two to find th...
Gabe Black
2006-10-31
Fix up configs.
Kevin Lim
2006-10-31
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-10-31
Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...
Kevin Lim
2006-10-31
Ports now have a pointer to the MemObject that owns it (can be NULL).
Kevin Lim
2006-10-31
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-31
remove connectAll() and connect() code since it isn't used anymore. (The pyth...
Ali Saidi
2006-10-31
add the ability to insert into the middle of the timing port send list
Ali Saidi
2006-10-31
Missed a few instances of this function.
Gabe Black
2006-10-31
Get rid of old, commented out code.
Gabe Black
2006-10-31
Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...
Gabe Black
2006-10-31
Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes mor...
Gabe Black
2006-10-30
Delete obsolete directories: src/oldmem, src/mem/timing, src/mem/NOTES.
Steve Reinhardt
2006-10-30
FSConfig.py:
Lisa Hsu
2006-10-30
se.py, fs.py:
Lisa Hsu
2006-10-30
ensure that there is a "/" between the cptdir and the cpt.%d.
Lisa Hsu
2006-10-30
Merge zizzer:/bk/newmem
Lisa Hsu
2006-10-30
decouple the switch option from the warmup period option - parsing was confus...
Lisa Hsu
2006-10-30
Use some python os.path stuff to make it more flexible where we can execute t...
Kevin Lim
2006-10-30
Merge zizzer:/bk/newmem
Lisa Hsu
2006-10-30
add some comments and make the warmup period in a switchover parameterizable.
Lisa Hsu
2006-10-29
An attempt to serialize the state of the micro code mechanism in the simple cpu.
Gabe Black
2006-10-29
Move the mem classes into util.isa so that multiple inheritance can be used i...
Gabe Black
2006-10-29
Fix when the IsDelayedCommit flag is set.
Gabe Black
2006-10-29
Bring casa and casxa up to date
Gabe Black
2006-10-29
Fixed ldstub to use the right format, and made the load/store operations use ...
Gabe Black
2006-10-29
Add an integer microcode register.
Gabe Black
2006-10-28
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-28
remove intel nic from SConscript
Ali Saidi
2006-10-28
This one really needs to be arch/faults.hh
Gabe Black
2006-10-28
Include the right version of faults.hh
Gabe Black
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