gem5 - gem5

Age	Commit message (Expand)	Author
2018-06-13	mem-cache: Make packet const in insertBlock	Daniel R. Carvalho
2018-06-13	mem-cache: Create Sector Cache	Daniel R. Carvalho
2018-06-12	tests: add some pthread and std::thread unit tests	Tuan Ta
2018-06-12	ruby: Fix initial weight in weighted LRU	Daniel R. Carvalho
2018-06-11	misc: Using smart pointers for memory Requests	Giacomo Travaglini
2018-06-11	misc: Substitute pointer to Request with aliased RequestPtr	Giacomo Travaglini
2018-06-08	mem-cache: Change Cache block tag check	Daniel R. Carvalho
2018-06-08	mem-cache: Use secure bit in findVictim	Daniel R. Carvalho
2018-06-08	mem-cache: Move tagsInUse to children	Daniel R. Carvalho
2018-06-08	mem-cache: Return evictions along with victims	Daniel R. Carvalho
2018-06-08	mem-cache: Use ReplaceableEntry in findBlockBySetAndWay	Daniel R. Carvalho
2018-06-08	sim: Rename the SimObject cxx_bases field to cxx_extra_bases.	Gabe Black
2018-06-07	dev-arm: Add a VirtIO MMIO device to VExpress_GEM5_V1	Andreas Sandberg
2018-06-07	dev-arm: Add a MMIO transport interface for VirtIO	Andreas Sandberg
2018-06-07	dev-arm: Add a GIC interrupt adaptor	Andreas Sandberg
2018-06-06	arch-arm: Remove dead doingStage2 variable in PT walker	Andreas Sandberg
2018-06-06	system-arm: Update gem5 timer interrupt specification	Andreas Sandberg
2018-06-06	arch-arm: Perform stage 2 lookups using the EL2 state	Andreas Sandberg
2018-06-06	arch-arm: Respect EL from translation type	Andreas Sandberg
2018-06-06	arch-arm: Fix page size handling when merging stage 1 and 2	Andreas Sandberg
2018-06-06	dev, arm: Add support for HYP & secure timers	Andreas Sandberg
2018-06-06	arch-arm: Adjust breakpoint EC depending on source state	Andreas Sandberg
2018-06-01	mem-cache: Privatize extractSet	Daniel R. Carvalho
2018-06-01	mem-cache: Create an address aware TempCacheBlk	Daniel R. Carvalho
2018-06-01	mem-cache: Fix secure bit modification	Daniel R. Carvalho
2018-05-31	mem-cache: Replace block visitor with std::function	Nikos Nikoleris
2018-05-31	mem-cache: Fix include directives in the cache related classes	Nikos Nikoleris
2018-05-31	mem-cache: Add a non-coherent cache	Nikos Nikoleris
2018-05-31	mem-cache: Move cache bypass mechanism to the ports	Nikos Nikoleris
2018-05-31	mem-cache: Adopt a more sensible cache class hierarchy	Nikos Nikoleris
2018-05-31	mem-cache: Add helper function to perform evictions	Nikos Nikoleris
2018-05-31	mem-cache: Delegate block invalidation to block allocation	Nikos Nikoleris
2018-05-31	mem-cache: Refactor the recvAtomic function	Nikos Nikoleris
2018-05-31	mem-cache: Refactor the cache recvTimingReq function	Nikos Nikoleris
2018-05-31	mem-cache: Refactor the cache recvTimingResp function	Nikos Nikoleris
2018-05-31	mem-cache: Fix RandomReplData	Daniel R. Carvalho
2018-05-30	gpu-compute: use X86ISA::TlbEntry over GpuTlbEntry	Brandon Potter
2018-05-30	dev: Exit correctly in dist-gem5 for SE mode	Michael LeBeane
2018-05-30	mem-cache: Determine if an MSHR has requests from another cache	Nikos Nikoleris
2018-05-29	arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOP	Giacomo Travaglini
2018-05-29	arch-arm: Remove unusued MISCREG_A64_UNIMPL	Giacomo Travaglini
2018-05-29	arch-arm: MPIDR.MT = 1 in a multithreaded system	Giacomo Travaglini
2018-05-29	arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation defined	Giacomo Travaglini
2018-05-29	cpu: Avoid unnecessary dynamic_pointer_cast in atomic model	Giacomo Travaglini
2018-05-29	arch-arm: Implement ARMv8.1 TTBR1_EL2 register	Giacomo Travaglini
2018-05-29	arch-arm: Add E2H bit to HCR_EL2 System register	Giacomo Travaglini
2018-05-24	x86: Add op classes to the MediaOps.	Gabe Black
2018-05-18	mem: Add support for more flexible DRAM timing and topologies	Wendy Elsasser
2018-05-18	mem: Optimize self-refresh entry	Wendy Elsasser
2018-05-17	mem-cache: Move reference count stats update to blk invalidation	Nikos Nikoleris