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outside of the loop so we get all of the jobs, not just the
last one.
util/pbs/send.py:
fix indent
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extra : convert_revision : eee9546b4945ff949fdfdf339fc95a23603b47d3
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util/pbs/job.py:
pass output dir to m5 directly
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extra : convert_revision : 10c28ac66c7e71615a239783e21ab36a47de992c
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add dprintf on alignment faults
fix RR benchmark rcS script name
Add Dual test without rcS script
Update Monet to be closer to the real thing
Fix p4/monet configs
Add a way to read the DRIR register with at 32bit access for validation
SConscript:
build/SConstruct:
always use mysql if the libraries are installed
arch/alpha/alpha_memory.cc:
Add a DPRINTF to print alignment faults when they happen
dev/tsunami_cchip.cc:
Add a way to read the DRIR for validation.
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extra : convert_revision : 8c112c958f36b785390c46e70a889a79c6bea015
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/merge
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extra : convert_revision : 5d73046310a64b80a6ba3832df3b30b55532d707
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output files and the output directory are are handled. Make
the output directory configuration via a command line parameter,
or an environment variable.
SConscript:
Add new output file stuff
base/misc.cc:
dev/simconsole.cc:
use new output file code
cpu/base_cpu.cc:
use new output file code to generate output streams
dev/etherdump.cc:
use the output file code to find the output directory
use a real stream instead of a pointer
dev/etherdump.hh:
use a real stream instead of a pointer
objects/Root.mpy:
output_dir and config_output_file are not longer configured here.
sim/main.cc:
- Completely rework the command line argument passing to deal with
changes in python and output files.
- Update help output to reflect changes.
- Remove all direct support for .ini files. They are strictly
for intermediate representation.
- Remove the --foo:bar=blah syntax for .ini files and add --foo.bar=blah
syntax for python. This will generate: foo.bar = 'blah' in the python
script.
- Add '-d' to set the output directory.
- Use new output file code to access the output stream.
sim/serialize.cc:
use the new code to find the output directory
sim/universe.cc:
Get rid of makeOutputStream. Use the new output file code.
Remove output_dir and config_output_file as parameters.
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extra : convert_revision : df2f0e13d401c3a60cae1239aa1ec3511721544d
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sim/pyconfig/m5config.py:
When getting all values, make sure we get the ones that are
parameter defaults as well.
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extra : convert_revision : 2b1c4b2f27dfab17ef9df18d7e5936e4a00bb12e
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util/pbs/pbs.py:
More tweaks that I forgot
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sim/pyconfig/SConscript:
Embed the jobfile.py script into the binary so that we don't
need to copy it into the Base directory every time.
test/genini.py:
Add the util/pbs directory to the path so we can get to
jobfile.py
Add a -I argument to set to add to the path.
util/pbs/pbs.py:
Create a MyPOpen class. This is a lot like the popen2.Popen3 class
in the python library except that my version allows redirection of
standard in and standard out to a file instead of a pipe.
Use this popen class to execute qsub or ssh qsub. This was important
for the ssh version of qsub because we need to pipe the script into
standard in of ssh so that the script can get to the qsub command.
(Otherwise we have a problem discovering the path.)
util/pbs/send.py:
Tweak the script so it figures out paths in NFS correctly.
Use the new system for running qsub.
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util/pbs/send.py:
always access the job directory via full path
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objects/Root.mpy:
Fake the param context stuff for now.
sim/param.cc:
Make empty vector enums work
sim/serialize.cc:
serialize_dir is always valid
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extra : convert_revision : c46373f0f4c70e6a2f01a81c0fa6bacab72d4c4f
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util/pbs/send.py:
- add a -d to set the job root directory allowing one to run
send.py from anywhere.
- specify full paths to files instead of relative paths to make -d
work and to allow ssh qsub to work again.
- make the Link directory only copy links that point to regular files.
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extra : convert_revision : dd330cee08b97c5d72c3d58ef123f83ac7ccede7
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base/str.cc:
base/str.hh:
Add a couple functions that allow you to split a string at
the first or last instance of a delimiter.
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extra : convert_revision : 2af22639e1b67ac61577c00475a555841a56f902
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Make it so the same path is not added to the system path twice.
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test/genini.py:
Make it possible to run genini from a different directory.
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extra : convert_revision : 57cfb010d6114512040bf334ea21c9ed87234be0
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Fix up configuration scrupts to have better support for
running on the simulation pool.
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dev/tsunami_cchip.cc:
add a fake register to tsunami that we can do 32bit reads to.
Warn on access.
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extra : convert_revision : d87860f3b527528151c23431556039bca6e12945
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into zizzer.eecs.umich.edu:/z/stever/bk/m5
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extra : convert_revision : aea0708fa6684e3203c03f17e8ae6ae87e893f04
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util/tracediff:
Fix bug (used += instead of .= for string concatenation in Perl...
wrong language!).
Also updated for new config (s/Universe/root/).
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extra : convert_revision : 0db3f22794037dc51cc29f78a75bd22012a8ecd9
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address calculation and memory access portions separately.
Not currently used by any CPU models, but Kevin says he needs this.
Also clean up handling of execution tracing for memory accesses
(move it all into isa_desc and out of CPU models).
Got rid of some ancient unused code too.
arch/alpha/isa_desc:
Add execute() methods to EAComp and MemAcc portions of memory
access instructions, to allow CPU models to execute the effective
address calculation and memory access portions separately.
Requires the execution context to remember the effective address
across the two invocations. Added setEA() and getEA() methods to
execution context to support this. A model that does not use the
split execution model can panic if these methods are called.
Also added hook to call traceData->setAddr() after EA computation
on any load or store operation.
arch/isa_parser.py:
Call traceData->setData() on memory writes (stores).
cpu/simple_cpu/simple_cpu.cc:
Get rid of unused code.
cpu/simple_cpu/simple_cpu.hh:
Add (non-functional) setEA() and getEA() methods for new
split memory access execution support.
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extra : convert_revision : bc2d2c758c4ca753812b9fa81f21038e55929ff0
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get rid of the alias for true to True and false to False to keep
consistent python syntax.
util/stats/info.py:
Fix typo
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extra : convert_revision : e69588a8de52424e043315e70008ca3a3ede7d5b
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dev/simconsole.cc:
sim/universe.cc:
isValid isn't compatible with new python stuff, so whack it.
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objects/AlphaConsole.mpy:
objects/AlphaTLB.mpy:
objects/BadDevice.mpy:
objects/BaseCPU.mpy:
objects/BaseCache.mpy:
objects/BaseSystem.mpy:
objects/Bus.mpy:
objects/CoherenceProtocol.mpy:
objects/Device.mpy:
objects/DiskImage.mpy:
objects/Ethernet.mpy:
objects/Ide.mpy:
objects/IntrControl.mpy:
objects/MemTest.mpy:
objects/Pci.mpy:
objects/PhysicalMemory.mpy:
objects/Platform.mpy:
objects/Process.mpy:
objects/Repl.mpy:
objects/Root.mpy:
objects/SimConsole.mpy:
objects/SimpleDisk.mpy:
objects/Tsunami.mpy:
objects/Uart.mpy:
simobj now requires a type= line if it is actually intended
to be a type
sim/pyconfig/SConscript:
keep track of the filename of embedded files for better
error messages.
sim/pyconfig/m5config.py:
Add support for the trickery done with the compiler to get the
simobj language feature added to the importer.
fix the bug that gave objects the wrong name in error messages.
test/genini.py:
Globals have been fixed and use execfile
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extra : convert_revision : b74495fd6f3479a87ecea7f1234ebb6731279b2b
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objects/BaseCache.mpy:
add all the Split parameters to the BaseCache simobj.
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extra : convert_revision : 4fcba3ce730f730ca8628ac7f4aa0fb9476474ab
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head in my mad prelim rush.
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extra : convert_revision : 59ca9cca2f2090d234708a695228bf4a91fc5f52
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all but tlaser_node.cc dependence on tlaserreg.h
dev/tsunami_io.cc:
dev/tsunamireg.h:
removed tlaserreg.h
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into zizzer.eecs.umich.edu:/.automount/zamp/z/ktlim2/m5-patched/m5-new
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into zamp.eecs.umich.edu:/z/ktlim2/m5-patched/m5-new
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objects/Root.mpy:
add checkpointing as a parameter to the root object.
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extra : convert_revision : 3b809ebd776c8a9256a4ad6f8783cd96ab5cb1b3
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that we can handle more uncached access (we will get some from multiple processors)
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extra : convert_revision : 4bb913340cda47925321da5f95aaa2ff95dbe9dd
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base/stats/events.cc:
cast this to an unsigned long long to make the compiler happy
on 64-bit platforms.
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extra : convert_revision : e893d21bb228cbfb0c23adb7c4eeb1f62209ca1c
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Fix the nat config.
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extra : convert_revision : 22bd4f20408371b644b51fd8d6b79486e1e5a59b
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest
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extra : convert_revision : 47fe06540907f6810cd1bccfc96a8705fd38c4ba
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into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/new_config
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extra : convert_revision : 8c87cd948d501b1fc58d57f1f505d1f72725ecde
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dev/pktfifo.cc:
Make it so that we don't unserialize the size of the fifo, clobering the fact that we were trying to make it bigger, and leading to a misleading config.out that states the un-overwritten max_size.
Perhaps this should instead be a panic if the size (amount that was serialized) is bigger than the maxsize that was assigned by the configuration file.
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arch/alpha/pseudo_inst.cc:
rename the context for consistency.
sim/pyconfig/m5config.py:
Add a ParamContext class so that param contexts work with
the new config stuff.
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extra : convert_revision : 3a6b583a25c86237baca7a2b4eccc9d12f86a384
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