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2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
readBytes and writeBytes had the word "bytes" in their names because they accessed blobs of bytes. This distinguished them from the read and write functions which handled higher level data types. Because those functions don't exist any more, this change renames readBytes and writeBytes to more general names, readMem and writeMem, which reflect the fact that they are how you read and write memory. This also makes their names more consistent with the register reading/writing functions, although those are still read and set for some reason.
2011-07-02ExecContext: Get rid of the now unused read/write templated functions.Gabe Black
2011-07-02ISA: Use readBytes/writeBytes for all instruction level memory operations.Gabe Black
2011-07-02Stats: Update stats for the x86 store fault fix.Gabe Black
2011-07-02X86: Fix store microops so they don't drop faults in timing mode.Gabe Black
If a fault was returned by the CPU when a store initiated it's write, the store instruction would ignore the fault. This change fixes that.
2011-07-01Ruby: Commit files missing from previous commitNilay Vaish
The previous commit on functional access support in Ruby did not have some of the files required. This patch adds those files to the repository.
2011-06-30Regression: Updates regression outputs for Ruby memtestBrad Beckmann
This patch updates the regression outputs for Ruby memtest. This was required because of the changes carried out by the addition of functional access support to Ruby.
2011-06-30config: removed unnecessary slashesBrad Beckmann
This patch removes unnecessary slashes from a couple of python scripts.
2011-06-30Ruby: Add support for functional accessesBrad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
This patch rpovides functional access support in Ruby. Currently only the M5Port of RubyPort supports functional accesses. The support for functional through the PioPort will be added as a separate patch.
2011-06-28arch: print next upc correctlyNilay Vaish
The patch corrects the print statement which prints the current and the next pc. Instead of the next upc, the next pc was being printed.
2011-06-24Ruby: remove unused functions in CacheMemory: get/setMemoryValueJoel Hestness
2011-06-22mips: fix nmsub and nmadd definitionsDeyaun Guo
the -/+ signs were flipped for nmsub_s, nmsub_d, and nmadd_d
2011-06-21X86: Eliminate an unused argument for building store microops.Gabe Black
2011-06-20inorder: sparc: add 02.insttest regressionKorey Sewell
2011-06-20inorder: sparc: add hello world regressionKorey Sewell
- add InOrderCPU compile option to SPARC - add hello regression for SPARC
2011-06-20merge regression updatesKorey Sewell
2011-06-20alpha:o3:simple: update simout/err filesKorey Sewell
A few prior changesets have changed the gem5 output in a way that wont cause errors but may be confusing for someone trying to debug the regressions. Ones that I caught were: - no more "warn: <hash address" - typo in the ALPHA Prefetch unimplemented warning Additionaly, the last updated stats changes rearrange the ordering of the stats output even though they are still correct stats (gem5 is smart enough to detect this). All the regressions pass w/the same stats even though it looks like they are being changed.
2011-06-20inorder: alpha-hello regression updateKorey Sewell
2011-06-20inorder: merge gabes compile fixKorey Sewell
2011-06-20InOder: Fix a compile error.Gabe Black
2011-06-19inorder: gem5.opt compileKorey Sewell
variable name typo.
2011-06-19inorder: update eon regr w/eon infoKorey Sewell
previous commit copied over O3 stats, this one puts the inorder ones in the right place
2011-06-19inorder: add 10.linux-boot regressionKorey Sewell
2011-06-19inorder: add eon regressionKorey Sewell
2011-06-19inorder: update SE regressionsKorey Sewell
2011-06-19inorder: clear reg. dep entry after removing from listKorey Sewell
this will safeguard future code from trying to remove from the list twice. That code wouldnt break but would waste time.
2011-06-19inorder: se: squash after syscallsKorey Sewell
2011-06-19inorder: cleanup dprintfs in cache unitKorey Sewell
2011-06-19inorder: SE mode TLB faultsKorey Sewell
handle them like we do in FS mode, by blocking the TLB until the fault is handled by the fault->invoke()
2011-06-19inorder:tracing: fix fault tracing bugKorey Sewell
2011-06-19inorder: se compile fixesKorey Sewell
2011-06-19inorder: add necessary debug flag header filesKorey Sewell
2011-06-19mips: mark unaligned access flag as trueKorey Sewell
2011-06-19inorder: clear fetchbuffer on trapsKorey Sewell
implement clearfetchbufferfunction extend predecoder to use multiple threads and clear those on trap
2011-06-19inorder: use separate float-reg bits function in dyninstKorey Sewell
this will make sure we get the correct view of a FP register
2011-06-19inorder: use trapPending flag to manage trapsKorey Sewell
2011-06-19inorder/dtb: make sure DTB translate correct addressKorey Sewell
The DTB expects the correct PC in the ThreadContext but how if the memory accesses are speculative? Shouldn't we send along the requestor's PC to the translate functions?
2011-06-19inorder: handle serializing instructionsKorey Sewell
including IPR accesses and store-conditionals. These class of instructions will not execute correctly in a superscalar machine
2011-06-19alpha: fix warn_once for prefetchesKorey Sewell
2011-06-19alpha: naming for dtb faultsKorey Sewell
Just "dfault" gets confusing while debugging. Why not differentiate whether it's an access violation or page fault
2011-06-19inorder: dont handle multiple faults on same cycleKorey Sewell
if a faulting instruction reaches an execution unit, then ignore it and pass it through the pipeline. Once we recognize the fault in the graduation unit, dont allow a second fault to creep in on the same cycle.
2011-06-19inorder: register ports for FS modeKorey Sewell
handle "snoop" port registration as well as functional port setup for FS mode
2011-06-19inorder: check for interrupts each tickKorey Sewell
use a dummy instruction to facilitate the squash after the interrupts trap
2011-06-19inorder: explicit fault checkKorey Sewell
Before graduating an instruction, explicitly check fault by making the fault check it's own separate command that can be put on an instruction schedule.
2011-06-19inorder: squash and trap behind a tlb faultKorey Sewell
2011-06-19inorder: stall stores on store conditionals & compare/swapsKorey Sewell
2011-06-19alpha: make hwrei a control instKorey Sewell
this always changes the PC and is basically an impromptu branch instruction. why not speculate on this instead of always be forced to mispredict/squash after the hwrei gets resolved? The InOrder model needs this marked as "isControl" so it knows to update the PC after the ALU executes it. If this isnt marked as control, then it's going to force the model to check the PC of every instruction at commit (what O3 does?), and that would be a wasteful check for a very high percentage of instructions.
2011-06-19inorder: make InOrder CPU FS compilable/visibleKorey Sewell
make syscall a SE mode only functionality copy over basic FS functions (hwrei) to make FS compile
2011-06-19inorder: remove memdep tracking for default pipelineKorey Sewell
speculative load/store pipelines can reenable this
2011-06-19inorder: fetchBuffer trackingKorey Sewell
calculate blocks in use for the fetch buffer to figure out how many total blocks are pending