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AgeCommit message (Expand)Author
2005-06-01A few more config updates. Works with regression now.Steve Reinhardt
2005-05-29Major cleanup of python config code.Steve Reinhardt
2005-05-28Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Steve Reinhardt
2005-05-28ns_gige_reg.h, ns_gige.cc:Lisa Hsu
2005-05-26Added copyright.Kevin Lim
2005-05-25Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Steve Reinhardt
2005-05-24Little debugging things.Steve Reinhardt
2005-05-20Update mem trace reader params.Steve Reinhardt
2005-05-20Minor changes to get new cpu to compile with FULL_SYSTEM.Steve Reinhardt
2005-05-19Fix up code for initial release. The main bug that remains is properly forwa...Kevin Lim
2005-05-17Merge ktlim@zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/ktlim2/current/m5Kevin Lim
2005-05-15Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5Steve Reinhardt
2005-05-15Fix "no supplier" bug.Steve Reinhardt
2005-05-14More cleanup of fetch code.Steve Reinhardt
2005-05-13Add mem_trace parameter to BaseCache.Steve Reinhardt
2005-05-13panic vs fatal fixes in bus.ccSteve Reinhardt
2005-05-12Force pipeline drain on first instruction of async interrupt handler.Steve Reinhardt
2005-05-12Get rid of unused SMT code from FullCPU.Steve Reinhardt
2005-05-09Add definitions for memory trace writers.Steve Reinhardt
2005-05-04Merge ktlim@zizzer:/bk/m5 into zamp.eecs.umich.edu:/z/ktlim2/current/m5Kevin Lim
2005-05-03Add support for dedicated 1GHz Simple CPURon Dreslinski
2005-05-03Large update of several parts of my code. The most notable change is the inc...Kevin Lim
2005-05-02Fix ethernet configurationNathan Binkert
2005-05-02Skip calibrate delay again.Nathan Binkert
2005-05-02Make sinic work with mpyNathan Binkert
2005-05-02workaround configuration bug in tick is ps.Nathan Binkert
2005-05-02Improve checkpointing of ethernet packets a bit.Nathan Binkert
2005-05-02Better configurations for checkpointing. Add more NIC options.Nathan Binkert
2005-05-02Make sure to just do the dma No Allocation on readsRon Dreslinski
2005-05-02Add environment parameter for Allocation policy of DMA'sRon Dreslinski
2005-05-02Merge ktlim@zizzer.eecs.umich.edu:/bk/m5Kevin Lim
2005-04-30Merge zizzer:/z/m5/Bitkeeper/m5Ron Dreslinski
2005-04-30Handle no_allocates as needing the response in miss_queue, like uncacheablesRon Dreslinski
2005-04-30Cleanup rcS files. Make sure there are enough tracked connections.Nathan Binkert
2005-04-29Add suport for no allocation of cache block on a dma read passing through a c...Ron Dreslinski
2005-04-28Clean up output for pc break events, and remove a unneeded break event.Ron Dreslinski
2005-04-28Make ip_conntrack table size largerRon Dreslinski
2005-04-24Add the m5 parameter to the ns83820 device model so that weNathan Binkert
2005-04-24cleanup mpy fileNathan Binkert
2005-04-22Make code more portable and port to cygwinNathan Binkert
2005-04-17Mostly hacks for multiplying Frequency-type proxies by constantsSteve Reinhardt
2005-04-15Merge ktlim@zizzer.eecs.umich.edu:/bk/m5Kevin Lim
2005-04-14FRon Dreslinski
2005-04-14Merge ktlim@zizzer.eecs.umich.edu:/bk/m5Kevin Lim
2005-04-13Make multiple calls to SimExit work.Nathan Binkert
2005-04-13Make the exit after max checkpoints code compile.Nathan Binkert
2005-04-13Add support to limit the number of checkpoints dropped.Nathan Binkert
2005-04-11Fixup split stats.Nathan Binkert
2005-04-11Update for changes in the way latencies and bandwidths are dealt with.Nathan Binkert
2005-04-11Make the notion of a global event tick independent of the actualNathan Binkert
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