index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
2017-10-13
cpu-o3: Check predication before the SQ size for a debug print
Nikos Nikoleris
2017-10-13
cpu-o3: Avoid early checker verification for store conditionals
Nikos Nikoleris
2017-10-05
tests: Fix path for module imports in ARM system configs again
Curtis Dunham
2017-10-05
misc: Add util/packet_pb2.py to .gitignore.
Gabe Black
2017-10-05
misc: Use a Makefile to ensure util/packet_pb2.py is up to date.
Gabe Black
2017-10-05
misc: When building packet_pb2.py, don't assume a particular CWD.
Gabe Black
2017-10-05
misc: Make decode_packet_trace.py print the new master ID fields.
Gabe Black
2017-10-05
misc: Small style fix in _EncodeVarint32.
Gabe Black
2017-10-05
misc: Rename the (De|En)codeVarint function _(De|En)codeVarint32.
Gabe Black
2017-10-05
misc: Fix the indentation in DecodeVarint in util/protolib.py.
Gabe Black
2017-10-04
tlm: Elastic Trace Example with L2 Cache Added
Matthias Jung
2017-09-28
sim-se: Fix mremap for downward growing mmap regions
Rico Amslinger
2017-09-27
arch-x86: fix CondInst decoding for MOV to Control Registers
Bjoern A. Zeeb
2017-09-27
arch: change panic for Vector traceData to warn_once
Bjoern A. Zeeb
2017-09-27
sim: make compile on FreeBSD prior to 11
Bjoern A. Zeeb
2017-09-26
util: Make dot_writer ignore NULL simobjects.
Gabe Black
2017-09-26
dev: Make the IDE controller handle NULL simobject pointers.
Gabe Black
2017-09-26
sim: Add a get_config_as_dict to the NullSimObject class.
Gabe Black
2017-09-26
sim: Don't add the NULL SimObject as a child of other SimObjects.
Gabe Black
2017-09-26
misc: Make the m5 utilities writefile command accept a host path.
Gabe Black
2017-09-26
sim: Give the NullSimObject singleton a _name.
Gabe Black
2017-09-26
sim: Add a NullSimObject.descendants function.
Gabe Black
2017-09-26
sim: Add a clear_parent function to NullSimObject.
Gabe Black
2017-09-26
sim: Check the SimObjectVector.has_parent function to use the "any" function.
Gabe Black
2017-09-26
sim: Only consider non-NULL elements in SimObjectVector.has_parent.
Gabe Black
2017-09-26
sim: Add a set_parent to NullSimObject which does nothing.
Gabe Black
2017-09-25
mem: Fill the new packet ID fields with master IDs when tracing packets.
Gabe Black
2017-09-25
mem: Add a "map" of packet IDs to strings in probe traces.
Gabe Black
2017-09-25
mem: Trace the request master ID in the MemTraceProbe.
Gabe Black
2017-09-25
mem: Record the request master ID in the PacketInfo structure.
Gabe Black
2017-09-25
dev, virtio: Improvements to diod process handling
Anouk Van Laer
2017-09-21
alpha: Move some initialization logic from loadState into unserialize.
Gabe Black
2017-09-21
sim: Stop using loadState in the Root SimObject.
Gabe Black
2017-09-20
kvm: arm: Get rid of functions which just wrap the subclasses version.
Gabe Black
2017-09-11
tlm: Don't set SystemC time resolution
Matthias Jung
2017-09-11
stats: Move the swpipl function into the Alpha kernel stats.
Gabe Black
2017-09-11
stats: Get rid of some kernel stats related cruft.
Gabe Black
2017-09-06
cpu: Fix bi-mode branch predictor thresholds
Rico Amslinger
2017-09-01
cpu-minor: Fix for addr range coverage calculation
Pau Cabre
2017-08-31
scons: bump required python version to 2.7 to support pybind11
Paul Rosenfeld
2017-08-30
arch-arm: Only increment SW PMU counters on writes to PMSWINC
Jose Marinho
2017-08-30
arch-arm: Add missing override keywords in fault.hh
Andreas Sandberg
2017-08-30
arch-x86: Add missing override in the X86 TLB
Andreas Sandberg
2017-08-30
arch-sparc: Add a FaultVals instantiation for VecDisabled
Andreas Sandberg
2017-08-30
arch-alpha: Add missing overrides
Andreas Sandberg
2017-08-30
python: Make GlobalExitEvent.getCode() return an int
Andreas Sandberg
2017-08-30
cpu-o3: fix data pkt initialization for split load
Matthias Hille
2017-08-28
x86: Use the new CondInst format for moves to/from control registers.
Gabe Black
2017-08-28
x86: Add a "CondInst" format for conditionally decoded instructions.
Gabe Black
2017-08-12
dev: Fix an IDE error check.
Gabe Black
[next]