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2006-11-03Add a new file which describes an ISA's interrupt handling mechanism. It reco...Gabe Black
2006-11-03Fixed a commentGabe Black
2006-11-02Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-11-02Have bus use the BadAddress device to handle bad addresses. The O3 CPU shoul...Kevin Lim
2006-11-02Implement device that will return BadAddress.Kevin Lim
2006-11-02Caches return a new functional port whenever asked for one.Kevin Lim
2006-11-02More proper handling of the ports.Kevin Lim
2006-11-02Remove function that should have been deleted.Kevin Lim
2006-11-02Use ISA specific makeExtMI.Kevin Lim
2006-11-01Merge zizzer:/bk/newmemLisa Hsu
2006-11-01factor some more commone code and enable going from checkpoint into arbitrary...Lisa Hsu
2006-11-01Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
2006-11-01Added code to handle draining.Gabe Black
2006-11-01Fix a range check on the ipr_index.Gabe Black
2006-11-01Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ...Gabe Black
2006-11-01make it so that you can do a standard switch without the caches option. this...Lisa Hsu
2006-11-01change name of 2nd switch_cpu so that ckpt recovery with multiple cpus doens'...Lisa Hsu
2006-10-31Arg!Gabe Black
2006-10-31More typos! I need to get nfs to work.Gabe Black
2006-10-31Fix another typoGabe Black
2006-10-31Check for out of range IPR values as well.Gabe Black
2006-10-31Fix stupid typoGabe Black
2006-10-31Make two simple utility functions to determine if a MiscReg index correspondi...Gabe Black
2006-10-31Forgot to add intr_flag in one place.Gabe Black
2006-10-31We don't include ipr.cc in SE builds, so don't call it.Gabe Black
2006-10-31Made the old name refer to the miscreg index to prevent having to change code...Gabe Black
2006-10-31Forgot to change the index.Gabe Black
2006-10-31Make the IPRs use regular miscreg indexes, and make a table or two to find th...Gabe Black
2006-10-31Fix up configs.Kevin Lim
2006-10-31Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-31Remove mem parameter. Now the translating port asks the CPU's dcache's peer ...Kevin Lim
2006-10-31Ports now have a pointer to the MemObject that owns it (can be NULL).Kevin Lim
2006-10-31Merge zizzer:/bk/newmemAli Saidi
2006-10-31remove connectAll() and connect() code since it isn't used anymore. (The pyth...Ali Saidi
2006-10-31add the ability to insert into the middle of the timing port send listAli Saidi
2006-10-31Missed a few instances of this function.Gabe Black
2006-10-31Get rid of old, commented out code.Gabe Black
2006-10-31Move IntrFlag into the MiscRegFile and get rid of specialized accessor functi...Gabe Black
2006-10-31Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes mor...Gabe Black
2006-10-30Delete obsolete directories: src/oldmem, src/mem/timing, src/mem/NOTES.Steve Reinhardt
2006-10-30FSConfig.py:Lisa Hsu
2006-10-30se.py, fs.py:Lisa Hsu
2006-10-30ensure that there is a "/" between the cptdir and the cpt.%d.Lisa Hsu
2006-10-30Merge zizzer:/bk/newmemLisa Hsu
2006-10-30decouple the switch option from the warmup period option - parsing was confus...Lisa Hsu
2006-10-30Use some python os.path stuff to make it more flexible where we can execute t...Kevin Lim
2006-10-30Merge zizzer:/bk/newmemLisa Hsu
2006-10-30add some comments and make the warmup period in a switchover parameterizable.Lisa Hsu
2006-10-29An attempt to serialize the state of the micro code mechanism in the simple cpu.Gabe Black
2006-10-29Move the mem classes into util.isa so that multiple inheritance can be used i...Gabe Black