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AgeCommit message (Expand)Author
2006-11-20Add in rom/rams for the nvram, hypervisor description, and partition descript...Gabe Black
2006-11-16Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemopsGabe Black
2006-11-16Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
2006-11-16Fixes for SPARC_FSGabe Black
2006-11-15Add L2 cache option to fs.py --l2cacheRon Dreslinski
2006-11-14Merge zizzer:/bk/newmemRon Dreslinski
2006-11-14Various fixes to delete packet and request a little better.Kevin Lim
2006-11-14Merge zizzer:/bk/newmemRon Dreslinski
2006-11-14Fix bugs around uni-coherence invalidates being propogated properly.Ron Dreslinski
2006-11-14Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
2006-11-14Merge 141.212.106.238:/home/gblack/m5/newmemmemopsGabe Black
2006-11-14Create a stub t1000 platform.Gabe Black
2006-11-14Merge zizzer:/bk/newmemLisa Hsu
2006-11-14interrupts.hh:Lisa Hsu
2006-11-14If all the targets aren't satisfied, reinitialize the packet.Ron Dreslinski
2006-11-14Update atomic and functional paths for snoops as wellRon Dreslinski
2006-11-14Merge 141.212.106.238:/home/gblack/m5/newmemmemopsGabe Black
2006-11-14Set hpstate to be what I'm assuming Legion is.Gabe Black
2006-11-14Make sure a POR doesn't clobber the value of the hpstate.Gabe Black
2006-11-14Fix up the disassembly a little.Gabe Black
2006-11-14Merge 141.212.106.238:/home/gblack/m5/newmemmemopsGabe Black
2006-11-14Update phase param in the .py file for the cpusRon Dreslinski
2006-11-14Update bus bridges now that snoop ranges are passed properlyRon Dreslinski
2006-11-14Make cpu's capable of having a phase shiftRon Dreslinski
2006-11-13Fix a bug to handle the fact that a CPU can send Functional accesses while a ...Ron Dreslinski
2006-11-13Merge zizzer:/bk/newmemRon Dreslinski
2006-11-13If we didn't satisfy all targets, reset the packet we are requesting with.Ron Dreslinski
2006-11-13Fix some errors related to snooping and functional access in the busRon Dreslinski
2006-11-13Fix problems with snoop ranges not working properly on functional accessesRon Dreslinski
2006-11-13Changes needed for a bus from CPU->L1Ron Dreslinski
2006-11-13Since cpus now send out snoop ranges, remove it from the cache.Ron Dreslinski
2006-11-13Make CPU models signal to update the snoop rangesRon Dreslinski
2006-11-13main.i:Lisa Hsu
2006-11-13Update splash2 config filesRon Dreslinski
2006-11-13Expose debugBreakCycle through swig and get rid ofNathan Binkert
2006-11-13Clean up commentNathan Binkert
2006-11-13Parse CC/CXX early so that we use the correct compiler for testing dependenci...Ali Saidi
2006-11-13Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-11-13More interrupt reworking.Kevin Lim
2006-11-12Merge zizzer.eecs.umich.edu:/bk/newmemSteve Reinhardt
2006-11-12Make setRegWithEffect do something in SE mode.Steve Reinhardt
2006-11-13Change warn to DPRINTF.Kevin Lim
2006-11-13Update output refs. Some FS statistics will change (namely the ITB) due to t...Kevin Lim
2006-11-12Fix typo.Kevin Lim
2006-11-12Fix for regression failure.Kevin Lim
2006-11-12Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
2006-11-12Merge ktlim@zamp:./local/clean/tmp/test-regressKevin Lim
2006-11-12Fix for non-FS compile.Kevin Lim
2006-11-12Create a module called internal where swigged stuff goes.Nathan Binkert
2006-11-12Updates to support new interrupt processing and removal of PcPAL.Kevin Lim