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AgeCommit message (Expand)Author
2013-04-22tests: Add support for testing KVM-based CPUsAndreas Sandberg
2013-04-22config: Add a KVM VM to systems with KVM CPUsAndreas Sandberg
2013-04-22kvm: Avoid synchronizing the TC on every KVM exitAndreas Sandberg
2013-04-22kvm: Basic support for hardware virtualized CPUsAndreas Sandberg
2013-04-22cpu: Let python scripts obtain the number of instructions executedTimothy M. Jones
2013-04-22arm: Enable support for triggering a sim panic on kernel panicsAndreas Sandberg
2013-04-22sim: separate nextCycle() and clockEdge() in clockedObjectsDam Sunwoo
2013-04-22cpu: generate SimPoint basic block vector profilesDam Sunwoo
2013-04-22ARM: Add support for HDLCD controller for TC2 and newer Versatile Express tiles.Chris Emmons
2013-04-22sim: Add helper functions that add PCEvents with custom argumentsAndreas Sandberg
2013-04-22cpu: fix a switching issue with the o3 cpu.Ali Saidi
2013-04-19stats: Update stats for ldr_ret_uop (changeset 35198406dd72)Andreas Hansson
2013-04-17Merged c22628fa2564 and 2285b98847d7Nilay Vaish
2013-04-17base: load weak symbols from object fileDeyuan Guo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2013-04-17arm: set ldr_ret_uop as conditional or unconditional controlNathanael Premillieu
2013-04-17ruby: moesi cmp directory: add copyright noticeNilay Vaish
2013-04-17config: ruby network test: remove piobus checkNilay Vaish
2013-04-17dev: Fix a bug in the use of seekp/seekgAndreas Hansson
2013-04-16stats: Bump the vortex stats to match latest behaviourAndreas Hansson
2013-04-09stats: Bump Ruby stats for new changesetsJoel Hestness
2013-04-09Configs: Fix handling of maxtick and take_checkpointsJoel Hestness
2013-04-09Ruby: Fix RubyPort evict packet memory leakJoel Hestness
2013-04-09Ruby: Delete packet requests during warmupJoel Hestness
2013-04-09Ruby: Add field to slicc machine for generic typeJoel Hestness
2013-04-09Ruby: Order profilers based on versionJoel Hestness
2013-04-09Ruby: More descriptive message buffer connection fatalJason Power
2013-04-09Ruby: Fix typo in Slicc if-statement AST errorJason Power
2013-04-07Ruby System, Cache Recorder: Use delete [] for trace varsJoel Hestness
2013-04-02rcs scripts: remove bbench.rcSAnthony Gutierrez
2013-03-29regressions: updates due to changes to o3 cpu, x86 memory mapNilay Vaish
2013-03-29o3cpu: commit: changes interrupt handlingNilay Vaish
2013-03-28x86: changes to apic, keyboardNilay Vaish
2013-03-28x86: create space in bios memory mapNilay Vaish
2013-03-28regressions: update eio stats due to cache latency fixNilay Vaish
2013-03-27regressions: update due to cache latency fixNilay Vaish
2013-03-27mem: Fix cache latency bugMitch Hayenga
2013-03-27scons: don't die on warnings in swig-generated codeSteve Reinhardt
2013-03-26util: Add a utility script for decoding packet tracesAndreas Hansson
2013-03-26util: Add a utility script for encoding packet tracesAndreas Hansson
2013-03-26stats: Update stats for cache retry event checkAndreas Hansson
2013-03-26mem: Cancel cache retry event when blocking portRene de Jong
2013-03-26stats: Update stats to reflect bus retry changesAndreas Hansson
2013-03-26mem: Separate waiting for the bus and waiting for a peerAndreas Hansson
2013-03-26mem: Introduce a variable for the retrying portAndreas Hansson
2013-03-26mem: Add a generic id field to the packet traceAndreas Hansson
2013-03-26mem: Add optional request flags to the packet traceAndreas Hansson
2013-03-26cpu: Remove CpuPort and use MasterPort in the CPU classesAndreas Hansson
2013-03-25x86: Revert [02321b16685f] which breaks m5ops on x86Andreas Sandberg
2013-03-22config: return exit event instead of causeNilay Vaish
2013-03-22regressions: updates to config.ini for ruby testsNilay Vaish
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