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AgeCommit message (Expand)Author
2011-02-23Mem: Print out memory when access > 8 bytesAli Saidi
2011-02-23ARM: Set ITSTATE correctly after FlushPipeAli Saidi
2011-02-23ARM: This panic can be hit during misspeculation so it can't exist.Ali Saidi
2011-02-23ARM: Bad interworking warn way to noisy when running real code w/misspeculation.Ali Saidi
2011-02-23O3: When a prefetch causes a fault, don't record it in the instAli Saidi
2011-02-23ARM: NEON instruction templates modified to set the predicate flag to false w...Giacomo Gabrielli
2011-02-23O3: If there is an outstanding table walk don't let the inst queue sleep.Ali Saidi
2011-02-23ARM: Squash state on FPSCR stride or len write.Ali Saidi
2011-02-23ARM: Mark store conditionals as such.Matt Horsnell
2011-02-23ARM: Do something for ISB, DSB, DMBAli Saidi
2011-02-23ARM: Fix bug that let two table walks occur in parallel.Ali Saidi
2011-02-23Includes: Don't include isa_traits.hh and use the TheISA namespace unless rea...Ali Saidi
2011-02-23ARM: Make Noop actually decode to a noop and set it's instflags.Ali Saidi
2011-02-23O3: Fix bug when a squash occurs right before TLB miss returns.Ali Saidi
2011-02-23ARM: Delete OABI syscall handling.Ali Saidi
2011-02-23CLCD: Fix some serialization bugs with the clcd controller.Ali Saidi
2011-02-23ARM: Clarifies creation of Linux and baremetal ARM systems.Ali Saidi
2011-02-23ARM: Add support for read of 100MHz clock in system controller.Ali Saidi
2011-02-23ARM: Reset simulation statistics when pref counters are reset.Ali Saidi
2011-02-23ARM: Adds dummy support for a L2 latency miscreg.Ali Saidi
2011-02-23configs: cache: add cache line size optionKorey Sewell
2011-02-23configs: set default cache paramsKorey Sewell
2011-02-23ruby: extend dprintfs for RubyGenerated TraceFlagKorey Sewell
2011-02-23ruby: cleaning up RubyQueue and RubyNetwork dprintfsKorey Sewell
2011-02-22m5: merged in hammer fixBrad Beckmann
2011-02-19Ruby: Machine Type missing in MOESI CMP directory protocolNilay Vaish
2011-02-19Ruby: clean MOESI CMP directory protocolNilay Vaish
2011-02-18m5: merge inorder/release-notes/make_release changesKorey Sewell
2011-02-18inorder: regr-update: reduce dynamic mem. use to speedup simsKorey Sewell
2011-02-18inorder: add names and slot #s to res. dprintsKorey Sewell
2011-02-18inorder: ignore nops in execution unitKorey Sewell
2011-02-18inorder: update graduation unitKorey Sewell
2011-02-18inorder: recognize isSerializeAfter flagKorey Sewell
2011-02-18inorder: update default thread size(=1)Korey Sewell
2011-02-18inorder: don't overuse getLatency()Korey Sewell
2011-02-18inorder: update max. resource bandwidthsKorey Sewell
2011-02-18inorder: cleanup in destructorsKorey Sewell
2011-02-18inorder: fix cache/fetch unit memory leaksKorey Sewell
2011-02-18inorder: remove events for zero-cycle resourcesKorey Sewell
2011-02-18inorder: update pipeline interface for handling finished resource reqsKorey Sewell
2011-02-18inorder: remove request map, use request vectorKorey Sewell
2011-02-18inorder: add valid bit for resource requestsKorey Sewell
2011-02-18inorder: remove reqRemoveListKorey Sewell
2011-02-18inorder: initialize res. req. vectors based on resource bandwidthKorey Sewell
2011-02-16merge alpha system files into treeNathan Binkert
2011-02-15Util: Get rid of the make_release.py script.Gabe Black
2011-02-16Cleanup system directory to fit into modern M5 treeNathan Binkert
2011-02-16copyright: update copyright on alpha system filesNathan Binkert
2011-02-15X86: Get rid of "inline" on the MicroPanic constructor in decoder.cc.Gabe Black
2011-02-14Info: Clean up some info files.Gabe Black