| Age | Commit message (Expand) | Author |
|---|
| 2013-03-26 | mem: Introduce a variable for the retrying port | Andreas Hansson |
| 2013-03-26 | mem: Add a generic id field to the packet trace | Andreas Hansson |
| 2013-03-26 | mem: Add optional request flags to the packet trace | Andreas Hansson |
| 2013-03-26 | cpu: Remove CpuPort and use MasterPort in the CPU classes | Andreas Hansson |
| 2013-03-25 | x86: Revert [02321b16685f] which breaks m5ops on x86 | Andreas Sandberg |
| 2013-03-22 | config: return exit event instead of cause | Nilay Vaish |
| 2013-03-22 | regressions: updates to config.ini for ruby tests | Nilay Vaish |
| 2013-03-22 | ruby: slicc: set sender, receiver clock objs for optional queue | Nilay Vaish |
| 2013-03-22 | ruby: message buffer: correct previous errors | Nilay Vaish |
| 2013-03-22 | ruby: message buffer: remove _ptr from some variables | Nilay Vaish |
| 2013-03-22 | ruby: message buffer node: used Tick in place of Cycles | Nilay Vaish |
| 2013-03-22 | ruby: consumer: avoid using receiver side clock | Nilay Vaish |
| 2013-03-22 | ruby: remove unsued profile functions | Nilay Vaish |
| 2013-03-22 | ruby: keep histogram of outstanding requests in seq | Nilay Vaish |
| 2013-03-22 | slicc: remove check if the L1Cache has a sequencer | Nilay Vaish |
| 2013-03-22 | ruby: move stall and wakeup functions to AbstractController | Nilay Vaish |
| 2013-03-22 | ruby: connect two controllers using only message buffers | Nilay Vaish |
| 2013-03-22 | ruby: convert Topology to regular class | Nilay Vaish |
| 2013-03-22 | ruby: network: move routers from topology to network | Nilay Vaish |
| 2013-03-20 | cpu: Avoid including inorder TLBUnit to avoid gcc LTO bug | Andreas Hansson |
| 2013-03-18 | scons: Try to use 'tcmalloc' before 'tcmalloc_minimal' | Andreas Sandberg |
| 2013-03-18 | scons: Avoid malloc/free compiler optimization when using tcmalloc | Andreas Sandberg |
| 2013-03-18 | scons: Don't explicitly add tcmalloc_minimal to LIBS | Andreas Sandberg |
| 2013-03-18 | scons: Include flags required to link statically with Python | Andreas Sandberg |
| 2013-03-18 | mem: Fix missing delete of packet in DRAM access | Andreas Hansson |
| 2013-03-15 | ruby: set: corrects csprintf() call introduced by 7d95b650c9b6 | Nilay Vaish |
| 2013-03-14 | scons: Check for known buggy version of SWIG (2.0.9) | Andreas Sandberg |
| 2013-03-12 | cpu: Fix state transition bug in the traffic generator | Andreas Sandberg |
| 2013-03-11 | regressions: x86: stats updates due to new x87 insts | Nilay Vaish |
| 2013-03-11 | x86: implement some of the x87 instructions | Nilay Vaish |
| 2013-03-07 | base: Fix address range granularity calculations | Andreas Hansson |
| 2013-03-07 | ruby: Fix gcc 4.8 maybe-uninitialized compilation error | Andreas Hansson |
| 2013-03-07 | x86: Make the table walker reset the packet delay | Andreas Hansson |
| 2013-03-06 | regressions: stats updates due to no physmem in ruby | Nilay Vaish |
| 2013-03-06 | ruby: remove the functional copy of memory in se mode | Nilay Vaish |
| 2013-03-06 | ruby: garnet: fixed: implement functional access | Nilay Vaish |
| 2013-03-04 | stats: update patches for branch predictor and fetch updates. | Ali Saidi |
| 2013-03-04 | cpu: fix a switching issue with the o3 cpu. | Ali Saidi |
| 2013-03-04 | ARM: fix some cases where instructions that write to fp reg 15 are accidently... | Ali Saidi |
| 2013-03-02 | ruby: fixes functional writes to RubyRequest | Blake Hechtman ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E) |
| 2013-03-02 | sim: remove duplicate check on stack size | Nilay Vaish |
| 2013-03-01 | mem: Add check if SimpleDRAM nextReqEvent is scheduled | Andreas Hansson |
| 2013-03-01 | mem: Add a method to build multi-channel DRAM configurations | Andreas Hansson |
| 2013-03-01 | stats: Update stats to reflect SimpleDRAM changes | Andreas Hansson |
| 2013-03-01 | mem: SimpleDRAM variable naming and whitespace fixes | Andreas Hansson |
| 2013-03-01 | mem: Add support for multi-channel DRAM configurations | Andreas Hansson |
| 2013-03-01 | mem: Merge interleaved ranges when creating backing store | Andreas Hansson |
| 2013-03-01 | mem: Merge ranges in bus before passing them on | Andreas Hansson |
| 2013-02-28 | ruby: mesi coherence protocol: invalidate lock | Dibakar Gope ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E) |
| 2013-02-20 | config: Fix --prog-interval command line option | Ali Saidi |
