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2012-01-31Merge with head, hopefully the last time for this batch.Gabe Black
2012-01-31clang: Enable compiling gem5 using clang 2.9 and 3.0Koan-Sin Tan
This patch adds the necessary flags to the SConstruct and SConscript files for compiling using clang 2.9 and later (on Ubuntu et al and OSX XCode 4.2), and also cleans up a bunch of compiler warnings found by clang. Most of the warnings are related to hidden virtual functions, comparisons with unsigneds >= 0, and if-statements with empty bodies. A number of mismatches between struct and class are also fixed. clang 2.8 is not working as it has problems with class names that occur in multiple namespaces (e.g. Statistics in kernel_stats.hh). clang has a bug (http://llvm.org/bugs/show_bug.cgi?id=7247) which causes confusion between the container std::set and the function Packet::set, and this is currently addressed by not including the entire namespace std, but rather selecting e.g. "using std::vector" in the appropriate places.
2012-01-31MEM: Remove the otherPort from the cache portsAndreas Hansson
This patch is a very straight-forward simplification, removing the unecessary otherPort pointer from the cache port. The pointer was only used to forward range changes, and the address range is fixed for the cache. Removing the pointer simplifies the transition to master/slave ports.
2012-01-31Thread: Use inherited baseCpu rather than cpu in SimpleThreadAndreas Hansson
This patch is a trivial simplification, removing the cpu pointer from SimpleThread and relying on the baseCpu pointer in ThreadState. The patch does not add or change any functionality, it merely cleans up the code.
2012-01-31util: implements "writefile" gem5 op to export file from guest to host ↵Dam Sunwoo
filesystem Usage: m5 writefile <filename> File will be created in the gem5 output folder with the identical filename. Implementation is largely based on the existing "readfile" functionality. Currently does not support exporting of folders.
2012-01-31CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5Geoffrey Blake
Brings the CheckerCPU back to life to allow FS and SE checking of the O3CPU. These changes have only been tested with the ARM ISA. Other ISAs potentially require modification.
2012-01-30Merge with main repository.Gabe Black
2012-01-30Ruby: Connect system port in Ruby network testAndreas Hansson
This patch moves the connection of the system port to create_system in Ruby.py. Thereby it allows the failing Ruby test (and other Ruby systems) to run again.
2012-01-30MEM: Make the RubyPort physMemPort a PioPort instead of M5PortAndreas Hansson
This patch makes the physMemPort of the RubyPort a PioPort rather than an M5Port. This reflects the fact that the M5Port and PioPort have different roles. The M5Port is really a coherent slave that is connected to the CPUs and other coherent masters of the system, e.g. DMA ports. The PioPort, on the other hand, is a master port that is connected to the memory and other slaves, for example the pio devices. This simplifies future changes into master/slave ports and is consistent with the port roles throughout the system.
2012-01-30MEM: Clean-up of Functional/Virtual/TranslatingPort remnantsAndreas Hansson
This patch cleans up forward declarations and a member-function prototype that still referred to the old FunctionalPort, VirtualPort and TranslatingPort. There is no change in functionality.
2012-01-29Yet another merge with the main repository.Gabe Black
--HG-- rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal rename : tests/long/00.gzip/ref/x86/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simout => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout rename : tests/long/00.gzip/ref/x86/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt rename : tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini => tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini rename : tests/long/10.mcf/ref/x86/linux/o3-timing/simout => tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout rename : tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt rename : tests/long/20.parser/ref/x86/linux/o3-timing/config.ini => tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini rename : tests/long/20.parser/ref/x86/linux/o3-timing/simout => tests/long/se/20.parser/ref/x86/linux/o3-timing/simout rename : tests/long/20.parser/ref/x86/linux/o3-timing/stats.txt => tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt rename : tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini => tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini rename : tests/long/70.twolf/ref/x86/linux/o3-timing/simout => tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout rename : tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/x86/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simout => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout rename : tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt
2012-01-29Implement Ali's review feedback.Gabe Black
Try to decrease indentation, and remove some redundant FullSystem checks.
2012-01-28Config: Enable O3 CPU and Ruby in FS modeNilay Vaish
2012-01-28X86 Regressions: Update stats due to introduction of TSONilay Vaish
2012-01-28O3 CPU LSQ: Implement TSONilay Vaish
This patch makes O3's LSQ maintain total order between stores. Essentially only the store at the head of the store buffer is allowed to be in flight. Only after that store completes, the next store is issued to the memory system. By default, the x86 architecture will have TSO.
2012-01-28SE/FS: Get rid of the FULL_SYSTEM config option.Gabe Black
2012-01-28SE/FS: Pull FULL_SYSTEM out of the build_opts filesGabe Black
--HG-- rename : build_opts/ALPHA_FS => build_opts/ALPHA rename : build_opts/ALPHA_SE_MESI_CMP_directory => build_opts/ALPHA_MESI_CMP_directory rename : build_opts/ALPHA_SE_MOESI_CMP_directory => build_opts/ALPHA_MOESI_CMP_directory rename : build_opts/ALPHA_SE_MOESI_CMP_token => build_opts/ALPHA_MOESI_CMP_token rename : build_opts/ALPHA_SE_MOESI_hammer => build_opts/ALPHA_MOESI_hammer rename : build_opts/ALPHA_SE_Network_test => build_opts/ALPHA_Network_test rename : build_opts/ARM_FS => build_opts/ARM rename : build_opts/MIPS_SE => build_opts/MIPS rename : build_opts/POWER_SE => build_opts/POWER rename : build_opts/SPARC_FS => build_opts/SPARC rename : build_opts/X86_FS => build_opts/X86
2012-01-28SE/FS: Get rid of FULL_SYSTEM in the configs directoryGabe Black
2012-01-28SE/FS: Make both SE and FS tests available all the time.Gabe Black
--HG-- rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/status => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/status rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/system.terminal rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simerr rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/system.terminal rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal rename : tests/long/10.linux-boot/test.py => tests/long/fs/10.linux-boot/test.py rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.hterm => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.hterm rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.pterm => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.pterm rename : tests/long/80.solaris-boot/test.py => tests/long/fs/80.solaris-boot/test.py rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simout rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/arm/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/arm/linux/o3-timing/simerr rename : tests/long/00.gzip/ref/arm/linux/o3-timing/simout => tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout rename : tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini rename : tests/long/00.gzip/ref/arm/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/arm/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/arm/linux/simple-timing/simout => tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout rename : tests/long/00.gzip/ref/arm/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/simerr rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/simout => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/simout rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/config.ini rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/simout => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/simout rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/00.gzip/ref/x86/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simerr rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simout => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout rename : tests/long/00.gzip/ref/x86/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini rename : tests/long/00.gzip/ref/x86/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/x86/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/x86/linux/simple-timing/simout => tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt rename : tests/long/00.gzip/test.py => tests/long/se/00.gzip/test.py rename : tests/long/10.mcf/ref/arm/linux/o3-timing/chair.cook.ppm => tests/long/se/10.mcf/ref/arm/linux/o3-timing/chair.cook.ppm rename : tests/long/10.mcf/ref/arm/linux/o3-timing/config.ini => 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rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/simerr => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simerr rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/simout => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout rename : 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tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt rename : 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tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt rename : tests/quick/00.hello/ref/arm/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/arm/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/arm/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/arm/linux/o3-timing/simout => tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout rename : tests/quick/00.hello/ref/arm/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/simerr => 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tests/quick/00.hello/ref/power/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/power/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/power/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/config.ini => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/config.ini rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/simerr => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/simerr rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/simout => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/simout rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats => 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tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/x86/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simout => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout rename : tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini rename : tests/quick/00.hello/ref/x86/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-timing/simout => tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout rename : tests/quick/00.hello/ref/x86/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt rename : tests/quick/00.hello/test.py => tests/quick/se/00.hello/test.py rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt rename : tests/quick/01.hello-2T-smt/test.py => tests/quick/se/01.hello-2T-smt/test.py rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simerr rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt rename : tests/quick/02.insttest/test.py => tests/quick/se/02.insttest/test.py rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/config.ini rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/simout => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/simout rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/stats.txt rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/config.ini rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt rename : tests/quick/20.eio-short/test.py => tests/quick/se/20.eio-short/test.py rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt rename : tests/quick/30.eio-mp/test.py => tests/quick/se/30.eio-mp/test.py rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/ruby.stats => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/ruby.stats rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt rename : tests/quick/40.m5threads-test-atomic/test.py => tests/quick/se/40.m5threads-test-atomic/test.py rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest/stats.txt rename : tests/quick/50.memtest/test.py => tests/quick/se/50.memtest/test.py rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt rename : tests/quick/60.rubytest/test.py => tests/quick/se/60.rubytest/test.py
2012-01-28SE/FS: Make SE vs. FS mode a runtime parameter.Gabe Black
2012-01-28MIPS: Fix a compiler warning from the eret instruction.Gabe Black
2012-01-28Merge with the main repo.Gabe Black
--HG-- rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-27ns_gige: Fix a missing curly brace in if-statementAndreas Hansson
This patch adds a missing curly brace when clearing and setting the appropriate bits in the ns_gige.cc code. This commit is not based on any runtime bug experienced, but rather inspection of the code.
2012-01-26configs: actually add ARMv7a-like cpu/cache fileRonald Dreslinski
2012-01-26configs: A more realistic configuration of an ARM-like processorRonald Dreslinski
2012-01-25MEM: Fix fs.py by specifying the range size rather than endAndreas Hansson
This patch fixes the currently broken fs.py by specifying the size of the bridge range rather than the end address. This effectively subtracts one when determining the address range for the IO bridge (from IO bus to membus), and thus avoids the overlapping ranges.
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-12Fix memory corruption issue with CopyStringOut()Mitchell Hayenga
CopyStringOut() improperly indexed setting the null character, would result in zeroing a random byte of memory after(out of bounds) the character array.
2012-01-25stats: Update stats for final tick and memory bandwidth patchesAli Saidi
2012-01-25sim: display final value of curTick in statsAli Saidi
Different from sim_ticks in that this value is restored from checkpoints and is never reset. Useful for aligning with framebuffer output ticks
2012-01-25Mem: Add simple bandwidth stats to PhysicalMemoryAli Saidi
2012-01-23Config: Enable using O3 CPU and Ruby in SE modeNilay Vaish
2012-01-23O3, Ruby: Forward invalidations from Ruby to O3 CPUNilay Vaish
This patch implements the functionality for forwarding invalidations and replacements from the L1 cache of the Ruby memory system to the O3 CPU. The implementation adds a list of ports to RubyPort. Whenever a replacement or an invalidation is performed, the L1 cache forwards this to all the ports, which is the LSQ in case of the O3 CPU.
2012-01-23MemCmd: Add a command for invalidation requests to LSQNilay Vaish
This command will be sent from the memory system (Ruby) to the LSQ of an O3 CPU so that the LSQ, if it needs to, invalidates the address in the request packet.
2012-01-17MEM: Make the bus default port yet another portAndreas Hansson
This patch removes the idiosyncratic nature of the default bus port and makes it yet another port in the list of interfaces. Rather than having a specific pointer to the default port we merely track the identifier of this port. This change makes future port diversification easier and overall cleans up the bus code.
2012-01-17MEM: Removing the default port peer from Python portsAndreas Hansson
In preparation for the introduction of Master and Slave ports, this patch removes the default port parameter in the Python port and thus forces the argument list of the Port to contain only the description. The drawback at this point is that the config port and dma port of PCI and DMA devices have to be connected explicitly. This is key for future diversification as the pio and config port are slaves, but the dma port is a master.
2012-01-17MEM: Make the bus bridge unidirectional and fixed address rangeAndreas Hansson
This patch makes the bus bridge uni-directional and specialises the bus ports to be a master port and a slave port. This greatly simplifies the assumptions on both sides as either port only has to deal with requests or responses. The following patches introduce the notion of master and slave ports, and would not be possible without this split of responsibilities. In making the bridge unidirectional, the address range mechanism of the bridge is also changed. For the cases where communication is taking place both ways, an additional bridge is needed. This causes issues with the existing mechanism, as the busses cannot determine when to stop iterating the address updates from the two bridges. To avoid this issue, and also greatly simplify the specification, the bridge now has a fixed set of address ranges, specified at creation time.
2012-01-17MEM: Remove the functional ports from the memory systemWilliam Wang
The functional ports are no longer used and this patch cleans up the legacy that is still present in buses, memories, CPUs etc. Note that this does not refer to the class FunctionalPort (already removed), but rather ports with the name (and use) functional.
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges.
2012-01-17MEM: Remove Port removeConn and MemObject deletePortRefsAndreas Hansson
Cleaning up and simplifying the ports and going towards a more strict elaboration-time creation and binding of the ports.
2012-01-17MEM: Remove the notion of the default portAndreas Hansson
This patch removes the default port and instead relies on the peer being set to NULL initially. The binding check (i.e. is a port connected or not) will eventually be moved to the init function of the modules.
2012-01-17MEM: Simplify ports by removing EventManagerAndreas Hansson
This patch removes the inheritance of EventManager from the ports and moves all responsibility for event queues to the owner. Eventually the event manager should be the interface block, which could either be the structural owner or a subblock like a LSQ in the O3 CPU for example.
2012-01-17CPU: Moving towards a more general port across CPU modelsAndreas Hansson
This patch performs minimal changes to move the instruction and data ports from specialised subclasses to the base CPU (to the largest degree possible). Ultimately it servers to make the CPU(s) have a well-defined interface to the memory sub-system.
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
Port proxies are used to replace non-structural ports, and thus enable all ports in the system to correspond to a structural entity. This has the advantage of accessing memory through the normal memory subsystem and thus allowing any constellation of distributed memories, address maps, etc. Most accesses are done through the "system port" that is used for loading binaries, debugging etc. For the entities that belong to the CPU, e.g. threads and thread contexts, they wrap the CPU data port in a port proxy. The following replacements are made: FunctionalPort > PortProxy TranslatingPort > SETranslatingPortProxy VirtualPort > FSTranslatingPortProxy --HG-- rename : src/mem/vport.cc => src/mem/fs_translating_port_proxy.cc rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-17Ruby: Change the access permissions for MOESI hammerAndreas Hansson
Regression statistics update.
2012-01-17Ruby: Change the access permissions for MOESI hammerAndreas Hansson
This patch changes the access permission for the WB_E_W state from Busy to Read_Write to avoid having issues in follow-on patches with functional accesses going through Ruby. This change was made after consultation with all involved parties and is more of a work-around than a fix.
2012-01-17MEM: Add the system port as a central access pointAndreas Hansson
The system port is used as a globally reachable access point to the memory subsystem. The benefit of using an actual port is that the usual infrastructure is used to resolve any access and thus makes the overall system able to handle distributed memories in any configuration, and also makes the accesses agnostic to the address map. This patch only introduces the port and does not actually use it for anything.
2012-01-17MEM: Differentiate functional cache accesses from CPU and memoryAndreas Hansson
This patch changes the functionalAccess member function in the cache model such that it is aware of what port the access came from, i.e. if it came from the CPU side or from the memory side. By adding this information, it is possible to respect the 'forwardSnoops' flag for snooping requests coming from the memory side and not forward them. This fixes an outstanding issue with the IO bus getting accesses that have no valid destination port and also cleans up future changes to the bus model.
2012-01-16stats: undo parser change from initparam changeAli Saidi
2012-01-16Alpha: warn_once about broken PAL breakpoints.Steve Reinhardt
A recent changeset (aae12ce9f34c) removed support for PAL-mode breakpoints in Alpha, since it was awkward and likely unused. This patch lets a user know if they potentially run into this limitation.
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