Age | Commit message (Collapse) | Author |
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util/stats/info.py:
If an operation results in a divide by zero, just return None
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actually print out a statistic.
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base/loader/symtab.cc:
Add support for clearing out the symbol table
Add support for serializing the symbol table (clear on unserialize)
Don't allow empty symbols to be entered into the table
base/loader/symtab.hh:
Add support for clearing out the symbol table
Add support for serializing the symbol table
sim/system.cc:
Serialize the kernel, console, and palcode symbol tables so that
we can capture any dynamic symbols that are added and so that we
don't have to have the same kernel binary around to get the
symbols right
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if we want something like allSymtab, we should create a symbol
table proxy class
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is going away
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cpu/profile.hh:
Add a placeholder for a reset callback
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cpu/profile.hh:
use Counter for the profile count to avoid overflow
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/head
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better mysql error messages
base/stats/mysql.cc:
better placement of commit() calls to avoid failing transactions
due to what I think are timeouts.
print out the mysql error with every panic
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profileNode if we got a new one
cpu/simple/cpu.cc:
Only update the exec context's profileNode if we got a new one
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are more efficient and reduce the number of new/delete calls
arch/alpha/stacktrace.cc:
- Change the StackTrace code so that the class can more easily be
cleaned out and reused to avoid extra allocations.
- Allow trace() to accept a static instruction pointer so it can
determine if the instruction is worth tracing. This is moved from
the CPU.
- provide constants for special meaning PCs (user, console, unknown),
instead of magic numbers
- switch to using kernelSymtab instead of allSymtab which will be
going away
- if the stack adjustment doesn't make any sense, exit and push
unknown so we don't get into an infinite loop or record garbage.
- check to see if we've made too many iterations through the stack
and panic to avoid an infinite loop
arch/alpha/stacktrace.hh:
- Change the StackTrace code so that the class can more easily be
cleaned out and reused to avoid extra allocations.
- Allow trace() to accept a static instruction pointer so it can
determine if the instruction is worth tracing. This is moved from
the CPU.
- provide constants for special meaning PCs (user, console, unknown),
instead of magic numbers
cpu/base.cc:
only clear the profile if we have one
include profile.hh here since base.hh doesn't do it anymore
cpu/base.hh:
no need to include cpu/profile.hh here
cpu/profile.cc:
use ProfileNode pointers instead of objects in the ChildList
Consume a vector of addresses since that's really all we
care about.
cpu/profile.hh:
Keep pointers to ProfileNodes to reduce the size of these structures
keep a StackTrace around so that we may reuse it.
provide consume functions that use the new StackTrace trace interface
one consume function is inline and tries to fastpath the no trace
condition, it calls the outlined consume function if a trace is generated.
cpu/simple/cpu.cc:
include cpu/profile.hh here since base.hh no longer does
use the new FunctionProfile::consume interface
(which contains the tracing functions)
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the BaseCPU class
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can specify either independently.
python/m5/objects/Device.py:
io_bus is split out into pio_bus and dma_bus so that any device
can specify either independently.
dma_bus defaults to point to whatever pio_bus uses.
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for retransmissions, out of order packets, lost packets, duplicate
ack, window full, etc. Easy way to see if you have a problem with a
run.
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amazingly we never did that before. Caused us to run out of
file descriptors in twolf.
sim/process.cc:
Add free_fd() method to free closed target fd in simulator fd map.
Rename open_fd() to alloc_fd() for symmetry with free_fd().
sim/process.hh:
Add free_fd() method to free closed target fd in simulator fd map.
Rename open_fd() to alloc_fd() for symmetry with free_fd().
Crank up MAX_FD while we're at it.
sim/syscall_emul.cc:
Call free_fd() on process when target closes a file.
sim/syscall_emul.hh:
Process open_fd() renamed to alloc_fd().
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base/trace.hh:
Need std:: on DPRINTFR reference to string class.
base/traceflags.py:
Remove SyscallWarnings trace flag... we should always print warnings
so nothing undesirable goes unnoticed. Replaced with (currently unused)
Syscall flag.
sim/syscall_emul.cc:
Change SyscallWarning DPRINTFs into warn() calls.
Uncomment SyscallVerbose DPRINTFs.
sim/syscall_emul.hh:
Change SyscallWarning DPRINTFs into warn() calls.
Call fatal() instead of ad-hoc termination.
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cpu/exetrace.cc:
CPU system name check doesn't work under syscall emulation, so don't
compile it in.
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into zed.eecs.umich.edu:/z/hsul/work/m5/intel
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running SPEC FP codes).
arch/alpha/isa_desc:
Don't warn about non-standard trapping modes more than
once per static instruction. (Had the flag to suppress
these but forgot to check it!)
build/SConstruct:
Add USE_SSE2 option to enable compiling w/SSE2 (important
for getting IEEE-compliant FP on x86).
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on a timeout.
util/qdo:
Qsub needs a kill -9 to die; kill -15 doesn't cut it.
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(3.23 does not work as we supposed it did).
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into zeep.eecs.umich.edu:/z/saidi/work/m5
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supported.
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base/random.cc:
Change normal random function to Xrand48 so we have one source of
randomness for everything.
base/random.hh:
Add uniform distribution ability to random functions
dev/etherlink.cc:
dev/etherlink.hh:
Add ability to slightly perturb latency of ethernet
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duplicate row in db
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python/m5/objects/Ethernet.py:
Add Latency Variability Parameter
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util/pbs/pbs.py:
Change the default so that we do not get mail under any circumstances
from pbs.
util/pbs/send.py:
Add a -n flag to send.py that causes the Base directory to *not*
sync with the Link directory
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losing type information.
python/m5/config.py:
Allow math on CheckedInt-derived ParamValue classes w/o
losing type information.
- Make CheckedInt derive from NumericParamValue, and *not*
multiply inherit from long
- Move CheckedInt bounds check to _check() hook so we can
call it when value is updated (not just in constructor)
python/m5/convert.py:
- make toInteger() return a long, making toLong() unnecessary
- toMemorySize should return long rather than float
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test/genini.py:
Use m5execfile to execute .py files so that sys.path gets handled correctly.
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into zed.eecs.umich.edu:/z/hsul/work/m5/clean
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util/qdo:
Don't automatically set qsub job name, as this causes qsub to fail
if the job name is too long or otherwise unsuitable.
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interrupts.
dev/sinic.cc:
- The prepareRead function sets all the variables in the register
file that depend on various state bits that change on the fly.
Includes RxDone, RxWait, TxDone, and TxWait
- Use the new register information accessor functions to grab
validity and size information for the read and write functions
- read all registers directly from the register space by offset
and size, not by actual name (less code)
- The side effect of reading the interrupt status (clearing it) now
happens outside the actual chunk of code where the value is loaded.
- Add an iprRead function for when we may want speculative access
to device registers through an ipr or special instruction.
- When RxData or TxData are written, their busy flag is set to
indicate that they have an outstanding transaction.
- The RxHigh and TxLow interrupts are special, they only interrupt
if the rxEmpty or txFull limits were hit
- Move reset to the command register
- Update more registers on reset, clear rxEmpty and txFull
- Data dumps only happen if EthernetData trace flag set
- When a DMA completes, kick the other engine if it was waiting
- implement all of the new interrupts
- serialize the new stuff
dev/sinic.hh:
- Put all registers with their proper size and alignment into
the regs struct so that we can copy multiple at a time.
- Provide accessor functions for accessing the registers with
different sizes.
- Flags to track when the rx fifo hit empty and the tx fifo became
full. These flags are used to determine what to do when below
the watermarks, and are reset when crossing the watermark.
- the txDmaEvent should actually trigger the txDmaDone function
- Add an iprRead function for when we may want speculative access
to device registers through an ipr or special instruction.
- The prepareRead function sets all the variables in the register
file that depend on various state bits that change on the fly.
- add rx_max_intr and dedicated (for dedicated thread) config params
dev/sinicreg.hh:
Add some new registers: Command, RxMaxIntr, RxFifoSize, TxFifoSize,
rename XxThreshold to XxFifoMark
Move Reset to the Command register
Add Thread to the Config register
New interrupts, better names
More info in RxDone and TxDone
Easier access to information on each register (size, read, write, name)
python/m5/objects/Ethernet.py:
Both sinic and nsgige have the dedicated thread
Add a parameter to configure the maximum number for receive
packets per interrupt
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dev/sinic.cc:
better name for both pio interfaces
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dev/ns_gige.cc:
why call it pio2 when there's only one?
dev/sinic.cc:
Give the interface a different name for stats/output purposes
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