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2006-11-28add 2.0b2 release notesAli Saidi
--HG-- extra : convert_revision : ce34f8086f682cc732bf868f6b9700e42c604ca3
2006-11-28Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/test-regress --HG-- extra : convert_revision : ffc7931d7da153b421b3c838a0968e484fd182ec
2006-11-28Remove assertion. It's not needed and messes up writebacks when a 2 level ↵Kevin Lim
cache is used in a uniprocessor setting. --HG-- extra : convert_revision : 020a9799cd7177fdb85a767701d6fcb8cf018827
2006-11-27Add TRACING_ON setting for m5.prof.Steve Reinhardt
--HG-- extra : convert_revision : ebda49bff30d76d3209acce55458d3f4e29594d3
2006-11-26Include check for making sure caches are enabled.Kevin Lim
--HG-- extra : convert_revision : e3902b065db524ebe5bf762e44a840133ccb8d75
2006-11-24Add no-op versions of ivlb and ivle back in for backwards compatibility.Steve Reinhardt
--HG-- extra : convert_revision : 383b72c130b20f3d7cde4e08fa36a481f3c0bf7c
2006-11-23Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head --HG-- extra : convert_revision : 154bc605c62b1e51c32e65916d4c2eda3a3f22fd
2006-11-22Do a functional access to levels above on a read as a temporary solution for ↵Ron Dreslinski
L2's in FS Fix a small writeback bug when missing in the L2 in atomic mode src/mem/bus.cc: Fix a comment to make sense src/mem/cache/cache_impl.hh: Do a functional access to levels above on a read as a temporary solution for L2's in FS Also fix a small writeback miss in L2 issue src/mem/cache/coherence/simple_coherence.hh: src/mem/cache/coherence/uni_coherence.cc: src/mem/cache/coherence/uni_coherence.hh: Do a functional access to levels above on a read as a temporary solution for L2's in FS tests/quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: Update ref's for writeback changes --HG-- extra : convert_revision : 937febd577b16b7fd97a5a68acaf53541828a251
2006-11-20Fix typo.Kevin Lim
--HG-- extra : convert_revision : 2dd830c6b3b5df894608b7596250b0181a3dfdf0
2006-11-19Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head --HG-- extra : convert_revision : c2b7784377d85df5b8ee39c891cd3da9907410d8
2006-11-19Update Virtual and Physical ports.Kevin Lim
src/cpu/o3/alpha/cpu_impl.hh: Handle the PhysicalPort and VirtualPort in the ThreadState. src/cpu/o3/cpu.cc: Initialize the thread context. src/cpu/o3/thread_context.hh: Add new function to initialize thread context. src/cpu/o3/thread_context_impl.hh: Use code now put into function. src/cpu/simple_thread.cc: Move code to ThreadState and use the new helper function. src/cpu/simple_thread.hh: Remove init() in this derived class; use init() from ThreadState base class. src/cpu/thread_state.cc: Move setting up of Physical and Virtual ports here. Change getMemFuncPort() to connectToMemFunc(), which connects a port to a functional port of the memory object below the CPU. src/cpu/thread_state.hh: Update functions. --HG-- extra : convert_revision : ff254715ef0b259dc80d08f13543b63e4024ca8d
2006-11-17Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 1fc55d7d5707bb7c63790aab306ca5ea8ade5fab
2006-11-17Make an initialization pass for the thread context and set the ↵Ron Dreslinski
[phys,virt]Port correctly src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: Call the thread context initialization --HG-- extra : convert_revision : d7dc2a8b893dc670077b7f6150d4b710a1778620
2006-11-16add warn_once which will print any given warning messageNathan Binkert
only once. --HG-- extra : convert_revision : b64bb495c1bd0c4beb3db6ca28fad5af4d05ef8e
2006-11-16Implement a single config file to encompass all of the SPECNathan Binkert
CPU2000 stuff, and use it in all of the tests that currently use SPEC --HG-- extra : convert_revision : 8cd26a597e51a90b6d2810d344a075f5aa0f011b
2006-11-16implement RUSAGE_CHILDREN for getrusage since it's trivialNathan Binkert
--HG-- extra : convert_revision : bc12b3b2e9ee02f42c437cbc20680ea00e19a801
2006-11-16Implement current working directory for LiveProcessesNathan Binkert
--HG-- extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
2006-11-15Add L2 cache option to fs.py --l2cacheRon Dreslinski
--HG-- extra : convert_revision : 5bdd1129c3b23e91d441e7b83f6a824ef7740fab
2006-11-14Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 8d61b474428d494b1a5382e4cf95934ad54e35dd
2006-11-14Various fixes to delete packet and request a little better.Kevin Lim
src/cpu/simple/timing.cc: Various updates for deleting requests more properly. The major change is moving the deletion of the fetch request/packet to after the instruction has executed and completed. This should fix a few bugs because Ron's memory system didn't expect a call for a functional access while a timing access was being processed. --HG-- extra : convert_revision : c7cf114bb1ff3cdaa7b0a40ed4c5302dc9d3a522
2006-11-14Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : b216fcdb2632dce68ac18932b0c13408eb1aeaf4
2006-11-14Fix bugs around uni-coherence invalidates being propogated properly.Ron Dreslinski
src/mem/bus.cc: Make it so that invalidates being sent from the responder up don't call the responder but they should also not Panic. src/mem/packet.hh: If we don't have data in the packet, don't call deleteData: Example: InvalidateRequests never have data. --HG-- extra : convert_revision : 18766bc9f3bb4d852ac651d094254d347abd1634
2006-11-14Merge zizzer:/bk/newmemLisa Hsu
into zed.eecs.umich.edu:/z/hsul/work/sparc/m5 --HG-- extra : convert_revision : 6abd919711966eaaa157483557a3f953b02dde01
2006-11-14interrupts.hh:Lisa Hsu
make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build src/arch/sparc/interrupts.hh: make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build --HG-- extra : convert_revision : 5f469d0cf897479b42703104cd801a8ef923fcae
2006-11-14If all the targets aren't satisfied, reinitialize the packet.Ron Dreslinski
--HG-- extra : convert_revision : 5b0a977a162a1b881b97a3185fb386cc76632a4a
2006-11-14Update atomic and functional paths for snoops as wellRon Dreslinski
--HG-- extra : convert_revision : 566d73438efb87ca683e4dee23454d880db3dfc7
2006-11-14Update phase param in the .py file for the cpusRon Dreslinski
--HG-- extra : convert_revision : cd2eb8c00adcb34b8693a4d1a66187927c0f6803
2006-11-14Update bus bridges now that snoop ranges are passed properlyRon Dreslinski
src/mem/bridge.cc: Update brdiges, now that snoop addresses are properly forwarded. Bus bridge should only handle snoops on the second phase (SNOOP_COMMIT) src/mem/bus.cc: src/mem/bus.hh: Make sure if a busBridge has access to both things that snoop and things that respond it only takes the request once --HG-- extra : convert_revision : 26cc9ee4429be45d4476fa435e0e9a54843c2509
2006-11-14Make cpu's capable of having a phase shiftRon Dreslinski
--HG-- extra : convert_revision : 7f082ba5c1cd2445aec731950c31a877aac23a75
2006-11-13Fix a bug to handle the fact that a CPU can send Functional accesses while a ↵Ron Dreslinski
sendTiming has not returned in the call stack. src/mem/cache/base_cache.cc: Sometimes a functional access comes while waiting on a outstanding packet being sent. This could be because Timing CPU does some post processing on the recvTiming which send functional access. Either the CPU should leave the pkt/req around (so They can be referenced in the mem system). Or the mem system should remove them from outstanding lists and reinsert them if they fail in the sendTiming. I did the later, eventually we should consider doing the former if that is the correct behavior. --HG-- extra : convert_revision : be41e0d2632369dca9d7c15e96e5576d7583fe6a
2006-11-13Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 253766a17bb5e109f8ad76b3c54e443db5274ef5
2006-11-13If we didn't satisfy all targets, reset the packet we are requesting with.Ron Dreslinski
--HG-- extra : convert_revision : 736372131b046eccf3520292fb3c086dc568d918
2006-11-13Fix some errors related to snooping and functional access in the busRon Dreslinski
src/mem/bus.cc: Only call snoop once per port, need to fix it so snoop ranges that overlap aren't added to list Functional accesses that call snoop and it goes to a higher bus may change the src, reset it after each snoop. --HG-- extra : convert_revision : 7276059c798a85cb9d138ccc5531298ecd055c13
2006-11-13Fix problems with snoop ranges not working properly on functional accessesRon Dreslinski
src/mem/bus.cc: Actually return the snoop list when asked for it. Don't get stuck in infinite functional loops --HG-- extra : convert_revision : 8e6dafbd10b30d48d28b6b5d4b464e8e8f6a3ddc
2006-11-13Changes needed for a bus from CPU->L1Ron Dreslinski
src/cpu/simple/atomic.cc: Make the atomic cpu return 0 on snoops. --HG-- extra : convert_revision : aad96ad36e0c764c7cfef8b0c8e97877574f5845
2006-11-13Since cpus now send out snoop ranges, remove it from the cache.Ron Dreslinski
--HG-- extra : convert_revision : 82882eb131aa66eba9f281b64db21d5cbfefb1b9
2006-11-13Make CPU models signal to update the snoop rangesRon Dreslinski
--HG-- extra : convert_revision : 717b62510f28a69af99453309fbbb458359eeb2a
2006-11-13main.i:Lisa Hsu
swig still thought the default arg for simulate() was -1, make it MaxTick --HG-- extra : convert_revision : 2bcbef7e5e5d28cf55645fdc53d43e3953b1a11c
2006-11-13Update splash2 config filesRon Dreslinski
configs/splash2/run.py: Fix MaxTick for splash configs configs/splash2/cluster.py: Add a config that allows clusters of CPU's to be attached to a single L1 --HG-- extra : convert_revision : 1bb0a0c5f4889316940a9858be90ae2eaa849f1a
2006-11-13Expose debugBreakCycle through swig and get rid ofNathan Binkert
the Debug param context --HG-- extra : convert_revision : 40e9dcfa9faedbe0c90a43f908f20a7c14ded6a4
2006-11-13Clean up commentNathan Binkert
--HG-- extra : convert_revision : 75c6415c49305e2f8cf7f833c66a46a4dee503ea
2006-11-13Parse CC/CXX early so that we use the correct compiler for testing ↵Ali Saidi
dependencies/versions/libraries/etc --HG-- extra : convert_revision : b34ee03e44b35df30b746c4c570316db75d6ffe5
2006-11-13Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : 6ef2249bfa3f7149830efdb42a313422090da7d7
2006-11-13More interrupt reworking.Kevin Lim
--HG-- extra : convert_revision : 40dfbb72c4e418c54e909c54dad5fe6ef7017cb4
2006-11-12Merge zizzer.eecs.umich.edu:/bk/newmemSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-head --HG-- extra : convert_revision : faab7569deefde94c20133b2f70a8567bcaa2960
2006-11-12Make setRegWithEffect do something in SE mode.Steve Reinhardt
--HG-- extra : convert_revision : 88fdaa403fe6d083f8c8fc064cb0d0d6a8b8daf8
2006-11-13Change warn to DPRINTF.Kevin Lim
--HG-- extra : convert_revision : 746bdf92334d220158eb0eb6bf113b4dcedbb354
2006-11-13Update output refs. Some FS statistics will change (namely the ITB) due to ↵Kevin Lim
the recent TLB changes. Now PAL mode accesses are counted as hits in the TLB. tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out: tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr: tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/o3-timing/stderr: tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt: tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini: tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.out: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini: tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out: Update refs. --HG-- extra : convert_revision : 6798c5753d4d7bd7b5667d59cf564012b781ce8a
2006-11-12Fix typo.Kevin Lim
--HG-- extra : convert_revision : 05db10e20d33302fe830d5759b8881b1233aca87
2006-11-12Fix for regression failure.Kevin Lim
src/cpu/o3/fetch_impl.hh: Fetch needs to make sure it isn't waiting on an Icache access. --HG-- extra : convert_revision : b53eb58b9e5a00bdb394134586d1f84f84d1c6e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-29 08:15:15 +0000