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2006-10-27Got rid of some outdated comments.Gabe Black
--HG-- extra : convert_revision : 30fa768c4a934cf5f9dc0ad84e0e421327ccbed3
2006-10-27Made the regfile compatible with the new definitions in MiscRegFileGabe Black
--HG-- extra : convert_revision : d63ea6fb1e549e737204ee6653c06f89ec5e43ef
2006-10-27Clean up MiscRegFileGabe Black
--HG-- extra : convert_revision : 3bc792596c99df3a5c2c82da58b801a63ccf6ddb
2006-10-26Reorganized the MiscRegFileGabe Black
--HG-- extra : convert_revision : 088112c9b8a4ea09c8015da5a0b65ed2fc9398d2
2006-10-26Cleaned up the decoder slightly.Gabe Black
--HG-- extra : convert_revision : a7050aa8768c132f0161f00ba17ae02d71f0b829
2006-10-26Added a few functions to stuff values into bitfields in an instruction.Gabe Black
--HG-- extra : convert_revision : 507d7e13fd6276acf36b75eba31dff5e8080113f
2006-10-26Changed the number of register windows to be more realistic.Gabe Black
--HG-- extra : convert_revision : ae557307f377b19bae82226dafa8b4b2654cae52
2006-10-26Got rid of some debug outputGabe Black
--HG-- extra : convert_revision : 6e98cf839dc92bde5f06f9b9bf11ca6ac661c907
2006-10-26Change the default function from setMiscRegWithEffect to setMiscRegGabe Black
--HG-- extra : convert_revision : bedf422d51a52b009390b1e94f5330f752be2b87
2006-10-25Fixed the priv instruction format.Gabe Black
src/arch/sparc/isa/formats/priv.isa: Fix the priv format so that it uses isa_parser operands rather than accessing the registers directly in checkCode. Also, the expressions needed to be negated. src/arch/sparc/isa/operands.isa: Added an Hpstate operand, and adjusted the numbering. --HG-- extra : convert_revision : 4a70862df061aa9e1b9eab125c4c2fc839ac3b5a
2006-10-25Implemented the saved and restored instructions, fixed up register window ↵Gabe Black
instructions so that the cwp is modified at the correct time (when handling the fault), and fixed the "done" instruction. --HG-- extra : convert_revision : 3c9144422f087af1d375782cce1c9b77ca7936c9
2006-10-25Fixed the bitfield FCN to include the right bits.Gabe Black
--HG-- extra : convert_revision : 040beb4dd982784773c3c3ad04cc48c2dc98b58c
2006-10-25Implemented the SPARC fill and spill handlers.Gabe Black
src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Added a function to do normal SPARC trap processing, and implemented the spill and fill faults for SE src/arch/sparc/process.cc: src/arch/sparc/process.hh: Added fill and spill handlers which are stuffed into the processes address space. The location of these handlers are stored in fillStart and spillStart. --HG-- extra : convert_revision : 59adb96570cce86f373fbc2c3e4c05abe1742d3b
2006-10-24Replace the Alpha No op with a SPARC one.Gabe Black
--HG-- extra : convert_revision : bed03e63dc80bf24f21bad08e6553d7aab92c7b3
2006-10-23Minor compile fix. Not sure why this is broken.Gabe Black
--HG-- extra : convert_revision : 6f181b15f37114ca0a3965cabcb2036bd2f97916
2006-10-23Move around more SPARC memory code, and make block memory operations work ↵Gabe Black
with the timing cpu --HG-- extra : convert_revision : 37358504c4d05d78d08c19ba3d0c99d38c4babf5
2006-10-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : cb15101d24ef2969e1819d6bdeeb2dd1f23f02d1
2006-10-23Add reference outputs for SPARC on the atomic timing cpu modelGabe Black
--HG-- extra : convert_revision : b64ff7c05504da6112631baaae8f0d927469e16f
2006-10-23Broke Load/Store instructions into microcode, and partially refactored ↵Gabe Black
memory operations in the SPARC ISA description. --HG-- rename : src/arch/sparc/isa/formats.isa => src/arch/sparc/isa/formats/formats.isa rename : src/arch/sparc/isa/formats/mem.isa => src/arch/sparc/isa/formats/mem/basicmem.isa rename : src/arch/sparc/isa/formats/blockmem.isa => src/arch/sparc/isa/formats/mem/blockmem.isa rename : src/arch/sparc/isa/formats/mem.isa => src/arch/sparc/isa/formats/mem/mem.isa extra : convert_revision : dbbb00f997a102871b084b209b9fa08c5e1853ee
2006-10-23Don't let interupts interupt microcode at undesired points.Gabe Black
--HG-- extra : convert_revision : a8ddc6b213b1a1b0d9c5cd194b88ac0c6bfb2a21
2006-10-23Files in base shouldn't depend on things in sim. Changed "sim/host.hh" to ↵Gabe Black
<inttypes.hh> --HG-- extra : convert_revision : c1e46c012a26cdb0603416f8e8a99e0ecb1c09bc
2006-10-23Start making memory ops work with InitiateAcc and CompleteAcc, and some ↵Gabe Black
minor cleanups --HG-- extra : convert_revision : 178a8c5d0506c75ad7a7e8d691c8863235ed7e95
2006-10-23Change the default constructors to take ExtMachInsts rather than regular ↵Gabe Black
MachInsts --HG-- extra : convert_revision : 8fa34f82e0cbf5ce81775d572b182826c578581f
2006-10-22Add mutex test to Benchmarks.py.Steve Reinhardt
--HG-- extra : convert_revision : 9b4f1ce9a181ac5a01e5b6a68067079969dfe9ce
2006-10-22Another missing case in a switch (like Nate's earlier fix).Steve Reinhardt
--HG-- extra : convert_revision : b2f195c29861a09e9dd99aefcf4a173be2f8c97c
2006-10-22Have tracediff print warning if no traceflags are set.Steve Reinhardt
Elaborate on description a bit. --HG-- extra : convert_revision : 2649961b53d6fb2774ddfb60219415ae4251db2d
2006-10-21Small bug fixes for timing LL/SC. Better now butSteve Reinhardt
not necessarily 100% there yet. src/mem/cache/cache_impl.hh: Generate response packet on failed store conditional. src/mem/packet.hh: Clear packet flags when reinitializing. (SATISFIED in particular is one we don't want to leave set.) --HG-- extra : convert_revision : 29207c8a09afcbce43f41c480ad0c1b21d47454f
2006-10-21Add Quiesce trace flag to track CPU quiesce/wakeup events.Steve Reinhardt
--HG-- extra : convert_revision : 23be99d0fe6e2184523efe5d9e0a1ac7bf19d087
2006-10-21Just give up if a store conditional misses completelySteve Reinhardt
in the cache (don't treat as normal write miss). --HG-- extra : convert_revision : c030eb6ba25318cae422e4da31e3b802049c8c74
2006-10-21Fix formatting that got screwed up when tabs were removed.Steve Reinhardt
--HG-- extra : convert_revision : 98596542a5774fe010e25632836ce92b66779f53
2006-10-21Refactor coherence state table initialization.Steve Reinhardt
--HG-- extra : convert_revision : eb36dd2cc1463e5076f4758a59cf68cc6b2bafc5
2006-10-21Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
into vm1.(none):/home/stever/bk/newmem-llsc --HG-- extra : convert_revision : 157d07cc56e8ea68741d1b8536a9856488cb4a69
2006-10-21Get rid of unused handleTargets() function.Steve Reinhardt
--HG-- extra : convert_revision : 90032c3831d10e98c6453cd6144f9c00b9f97219
2006-10-21Tweak a few things for better page fault debugging.Steve Reinhardt
src/sim/faults.cc: Fix fault message. src/kern/tru64/tru64.hh: Add DPRINTF to see where new thread stacks are allocated. src/arch/alpha/faults.cc: Add print statement so we know what the faulting address is in SE mode. --HG-- extra : convert_revision : 6eb2b513c339496a0d013b7e914953a0a066c12d
2006-10-21Updated to work with new command line argument ordering.Steve Reinhardt
Note that command line syntax has totally changed as a result. See comments for more details. --HG-- extra : convert_revision : bdb6e27abd2da83c7468dfe2a95e8bf54757ac6c
2006-10-21Merge zizzer.eecs.umich.edu:/bk/newmemNathan Binkert
into iceaxe.:/Volumes/work/research/m5/incoming --HG-- extra : convert_revision : c9153e5dca1d1f46a34770c645761d7b0419e8ce
2006-10-21Missing caseNathan Binkert
--HG-- extra : convert_revision : 128896dd1a654fe9a02e2c07ef6ce6799b62f21f
2006-10-20Add some default options, point it to the /dist version of the splash benchmarksRon Dreslinski
--HG-- extra : convert_revision : cd3b4f395b360d646b8b60464768eaad0fd110a4
2006-10-20Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 4678ce5fb0dc29a28d9cd21e687f9cee967d21fa
2006-10-20Clean up splash2 so it works in v2.0Ron Dreslinski
configs/splash2/run.py: Update the splash2 file --HG-- extra : convert_revision : b57ef1ab4b8fd1eaf281358db623b7581b96546b
2006-10-20Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem --HG-- extra : convert_revision : 2711fec2bf72801999b060e65f0bf744c18734fb
2006-10-20Construct a correct value of PYTHONHOME from the interpreterNathan Binkert
running SCons, make it into a sticky option that can be overridden at build time, and set it up before the interpreter is started. Also, fix the code that turns sticky options into config/*.hh so that it works with types other than bool. --HG-- extra : convert_revision : 602398b35d4da4e813f78865678ed348fdea7270
2006-10-20Give physical memory some latency to stress the systemRon Dreslinski
--HG-- extra : convert_revision : 3ca32ff9140770d0774cac5e82807a0574db09dd
2006-10-20Add a config file in the example with the memtester and some parser options.Ron Dreslinski
--HG-- extra : convert_revision : e70ccc3de4f7a3ae20ff9ec672853ee1555ed41b
2006-10-20Get rid of a variable put back by merge.Ron Dreslinski
--HG-- extra : convert_revision : 5ddb6ae5d5412f062c07c16a27b79483430b5f22
2006-10-20Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest src/mem/tport.cc: Merge PacketPtr changes --HG-- extra : convert_revision : 0329c5803a3df67af3dda89bd9d4753fd1a286d1
2006-10-20Use fixPacket function everywhere.Ron Dreslinski
Fix fixPacket assert function. Stop timing port from forwarding the request if a response was found in its queue on a read. src/cpu/memtest/memtest.cc: src/cpu/memtest/memtest.hh: src/python/m5/objects/MemTest.py: Add parameter to configure what percentage of mem accesses are functional src/mem/cache/base_cache.cc: src/mem/cache/cache_impl.hh: Use fix Packet function src/mem/packet.cc: Fix an assert that was checking the wrong thing src/mem/tport.cc: Properly detect if we need to do the access to the functional device --HG-- extra : convert_revision : 447cc1a9a65ddd2a41e937fb09dc0e7c74e9c75e
2006-10-20Use PacketPtr everywhereNathan Binkert
--HG-- extra : convert_revision : d9eb83ab77ffd2d725961f295b1733137e187711
2006-10-19refactor code for the packet, get rid of packet_impl.hhNathan Binkert
and call it packet_access.hh and fix the #includes so things compile right. --HG-- extra : convert_revision : d3626c9715b9f7e51bb3ab8d97e971fad4e0b724
2006-10-19initialize end, clean up loopNathan Binkert
--HG-- extra : convert_revision : e1c107f0c0fd5d535acd2d6c43571a5df57c9ed3
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-29 15:34:57 +0000