Age | Commit message (Expand) | Author |
2014-10-16 | scons: create dummy target to have SWIG generate C++ classes | Curtis Dunham |
2014-10-16 | config: Add a --without-python option to build process | Andrew Bardsley |
2014-10-16 | stats: Small bump of trailing stats | Andreas Hansson |
2014-10-11 | stats: updates due to changes to x86, stale configs. | Nilay Vaish |
2014-10-11 | cpu: Fix o3 SMT IQCount bug | Andrew Lukefahr |
2014-10-11 | util: adds a script for using DSENT | Nilay Vaish |
2014-10-11 | ext: dsent: adds a Python interface, drops C++ one | Nilay Vaish |
2014-10-11 | ext: add the source code for DSENT | Nilay Vaish |
2014-10-11 | ruby: network: garnet: add statistics for different activities | Nilay Vaish |
2014-10-11 | ruby: network: garnet: remove functions for computing power | Nilay Vaish |
2014-10-11 | ruby: drop Orion network power model | Nilay Vaish |
2014-10-11 | ruby: mesi: slight renaming | Nilay Vaish |
2014-10-11 | config: separate function for instantiating a memory controller | Nilay Vaish |
2014-10-11 | ruby: structures: coorect #ifndef macros in header files | Nilay Vaish |
2014-10-11 | ruby: moesi hammer: correct typo in master-slave assignment | Nilay Vaish |
2014-06-13 | x86: add LongModeAddressSize function to cpuid | Jiuyue Ma |
2014-07-17 | config, x86: Ensure that PCI devs get bridged to the memory bus | Jiuyue Ma |
2014-07-17 | config, x86: swap bus_id of ISA/PCI in X86 IntelMPTable | Jiuyue Ma |
2014-10-11 | sim: draining bug for fast-forwaring multiple cores | Andrew Lukefahr |
2014-10-11 | base: addr range: slight change to validity check | Nilay Vaish |
2014-10-11 | base: misc: Add missing header file. | Nilay Vaish |
2014-10-09 | stats: Add DRAM power statistics to reference output | Andreas Hansson |
2014-07-29 | mem: DRAMPower integration for on-line DRAM power stats | Omar Naji |
2014-07-29 | mem: Add DRAMPower wrapping class | Omar Naji |
2014-07-25 | mem: Add missig timing and current parameters to DRAM configs | Omar Naji |
2014-10-09 | mem: Remove DRAMSim2 DDR3 configuration | Omar Naji |
2014-10-09 | ext: Add DRAMPower to enable on-line DRAM power modelling | Andreas Hansson |
2014-10-09 | config: Add Current as a parameter type | Andreas Hansson |
2014-10-09 | cpu: Remove Ozone CPU from the source tree | Mitch Hayenga |
2014-10-09 | scons: Warn for known gcc and swig incompatibilities | Andreas Hansson |
2014-10-09 | mem: Add packet sanity checks to cache and MSHRs | Andreas Hansson |
2014-10-09 | mem: Allow packet queue to move next send event forward | Andreas Hansson |
2014-10-01 | misc: Fix issues identified by static analysis | Andreas Hansson |
2014-10-01 | arm: Use MiscRegIndex rather than int when flattening | Andreas Hansson |
2014-10-01 | arm: More UBSan cleanups after additional full-system runs | Andreas Hansson |
2014-09-28 | stats: Update stats to reflect ARM fixes | Andreas Hansson |
2014-09-27 | arm: Fixed undefined behaviours identified by gcc | Andreas Hansson |
2014-09-27 | arch: Use const StaticInstPtr references where possible | Andreas Hansson |
2014-09-27 | scons: Address issues related to gcc 4.9.1 | Andreas Hansson |
2014-09-27 | dev: Output invalid access size in IsaFake panic | Curtis Dunham |
2014-09-27 | mem: Output precise range when XBar has conflicts | Curtis Dunham |
2014-09-27 | mem: Provide better diagnostic for unconnected port | Curtis Dunham |
2014-09-27 | misc: Fix a bunch of minor issues identified by static analysis | Andreas Hansson |
2014-09-21 | stats: update t1000 stats for recent changes | Steve Reinhardt |
2014-09-21 | stats: update eio stats for recent changes | Steve Reinhardt |
2014-09-20 | stats: Bump stats for filter, crossbar and config changes | Andreas Hansson |
2014-09-20 | cpu: Remove unused deallocateContext calls | Mitch Hayenga |
2014-09-20 | alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate | Mitch Hayenga |
2014-09-20 | tests: Use more representative configs for ARM tests | Andreas Hansson |
2014-09-20 | mem: Rename Bus to XBar to better reflect its behaviour | Andreas Hansson |