gem5 - gem5

Age	Commit message (Expand)	Author
2018-02-13	sim: Make Stats truly non-copy-constructible	Rekai Gonzalez-Alberquilla
2018-02-09	Fix DDR4_2400_8x8 DRAMCTRL configuration	Wendy Elsasser
2018-02-09	sim: Remove _numContexts member in System class	Giacomo Travaglini
2018-02-09	dev: Fix i8042 device errors	Jason Lowe-Power
2018-02-08	mem-cache: Make cache warmup percentage a parameter.	Daniel R. Carvalho
2018-02-08	arch-arm: Correct SecureMonitorTrap vals for aarch32	Giacomo Travaglini
2018-02-08	arch-arm: Fixed error in choosing vector offset	Chuan Zhu
2018-02-08	arch-arm: Don't change PSTATE in Illegal Exception return	Giacomo Travaglini
2018-02-08	arch-arm: Handle route to EL2 in Supervisor Trap	Chuan Zhu
2018-02-07	arch-arm: Change the type of fault for dc ivac instructions	Nikos Nikoleris
2018-02-07	arch-arm: Unify permission checks for dc * instructions	Nikos Nikoleris
2018-02-07	arch-arm: Check cache maintenance insts for permission faults	Nikos Nikoleris
2018-02-07	arch-arm: Turn dc ivac to dc civac when some conditions are met	Nikos Nikoleris
2018-02-07	arch-arm: Fix printing of the data cache maintenance instructions	Nikos Nikoleris
2018-02-07	arch-arm: Fix cache line size for cache maintenace inst	Nikos Nikoleris
2018-02-07	arch-arm: Fault when dc ivac is executed from EL0	Nikos Nikoleris
2018-02-07	mem-cache: Only pendingModified MSHRs can satisfy CMO snoops	Nikos Nikoleris
2018-02-07	mem-cache: Cleaned blocks should be marked as not writable	Nikos Nikoleris
2018-02-07	arch-arm: Change function name for banked miscregs	Giacomo Travaglini
2018-02-07	arch-arm: Fix AArch32 SETEND Instruction	Giacomo Travaglini
2018-02-07	arch-arm: Correct Illegal Exception Return detection	Giacomo Travaglini
2018-02-07	arch-arm: ELUsingAArch32K from armarm pseudocode	Giacomo Travaglini
2018-02-07	arch-arm: isSecureBelow from armarm pseudocode	Giacomo Travaglini
2018-02-07	arch-arm: Fix incorrect assumptions in ELIs64	Chuan Zhu
2018-02-06	mem-cache: Remove extra numSets zero check.	Daniel R. Carvalho
2018-02-06	mem: Standardize mem folder header guards	Daniel R. Carvalho
2018-02-05	base: Update #includes for bitunion.hh.	Gabe Black
2018-02-05	config: remove dead code in fs.py	Nayan Deshmukh
2018-02-05	cpu: MinorCPU handling IsSquashAfter flag	Giacomo Travaglini
2018-02-05	arch-arm: Removing Serializing flag from ISB	Giacomo Travaglini
2018-02-02	base: Fix unused function warning	Nikos Nikoleris
2018-02-01	alpha: fix for no 'break' in the case statement	Sujay Phadke
2018-02-01	scons: Resolve backtrace implementation existence testing failure	Hanhwi Jang
2018-01-31	arch-x86: consistent style of comments in system files	Christian Menard
2018-01-30	arch-x86: Granularity bit and segment limit	Maximilian Stein
2018-01-29	riscv: Add overrides to various StaticInst methods.	Gabe Black
2018-01-29	base: Remove the ability to cprintf stringstreams directly.	Gabe Black
2018-01-29	base: Delete commented out versions of the format_integer function.	Gabe Black
2018-01-29	arch-arm: understandably initialize register permissions	Curtis Dunham
2018-01-29	arm: extend MiscReg metadata structures	Curtis Dunham
2018-01-29	arch-arm: understandably initialize register mappings	Curtis Dunham
2018-01-29	config, arm: enable device tree autogeneration for bigLITTLE	Curtis Dunham
2018-01-29	config: Embed Device Tree generation in fs.py config	Glenn Bergmans
2018-01-29	arm: DT autogeneration - generate PCI node	Glenn Bergmans
2018-01-29	arm: DT autogeneration - Generate energy controller node	Glenn Bergmans
2018-01-29	arm: DT autogeneration - autogenerate RealView Platform devices	Glenn Bergmans
2018-01-29	arm: DT autogeneration - Generate memory node	Glenn Bergmans
2018-01-29	arm: DT autogeneration - Generate cpus node	Glenn Bergmans
2018-01-29	arm: DT autogeneration - Device Tree generation methods	Glenn Bergmans
2018-01-29	ext: DT autogeneration - Add PyFtd to m5 space	Glenn Bergmans