summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2007-03-07If we're running the quick tests, remove the SPARC_FS build since we don't ↵Ali Saidi
have any quick SPARC_FS tests at the moment --HG-- extra : convert_revision : 4505f1600cae5d049560f3b397541e9a9dea0420
2007-03-04Don't use the exact same name as a system header #defineNathan Binkert
--HG-- extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
2007-03-03add a sparc fs regressionAli Saidi
src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-03Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
2007-03-03Add Iob and remove the fake deviceAli Saidi
configs/common/FSConfig.py: add an attachOnChipIO to force people to think about where "onchip" i/o should be connected in their hierarchy --HG-- extra : convert_revision : cf79a9a00760b7daf28063f407a04bd38b956843
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03include signal.hNathan Binkert
--HG-- extra : convert_revision : 9b5ad2704dfd63a1aa8ad0e4275fd0e3a7d32d6d
2007-03-03Merge zizzer.eecs.umich.edu:/bk/newmemNathan Binkert
into iceaxe.int.chaotic.net:/Users/nate/work/m5/outgoing --HG-- extra : convert_revision : b3d48721ead389fa807c0d5392039d4fc71a252e
2007-03-03Do the default argument stuff in pythonNathan Binkert
--HG-- extra : convert_revision : 235f85e611a669401c6ddfbdf14244e80eb55888
2007-03-03Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32 --HG-- extra : convert_revision : bbd0def502e423e64e2c4f6415a4b043b60c7f90
2007-03-02Factor code out of main.cc and main.i into a bunch of filesNathan Binkert
so things are organized in a more sensible manner. Take apart finalInit and expose the individual functions which are now called from python. Make checkpointing a bit easier to use. --HG-- extra : convert_revision : f470ddabbb47103e7b4734ef753c40089f2dcd9d
2007-03-03Implement the _llseek syscall. It's Linux only, so we'll actually use the ↵Gabe Black
lseek syscall. --HG-- extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
2007-03-03Fix some issues with 32 bit processes.Gabe Black
--HG-- extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
2007-03-03Keep around which input set was used for a benchmark, and make vortex work ↵Gabe Black
with SPARC. --HG-- extra : convert_revision : c891435a31e81fb8294484aedf340c0c96c8afa2
2007-03-02make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way ↵Ali Saidi
as the twin 64 bit loads src/arch/isa_parser.py: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/operands.isa: src/base/bigint.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/mem/packet_access.hh: make ldtw(a) Twin 32 bit load work correctly --HG-- extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42
2007-03-02Forgot to commit this new file last earlier.Gabe Black
--HG-- extra : convert_revision : f2d80ae551b7e29426141d5c9fe355b43a0b9c7d
2007-02-28Make the m5 psuedo instructions use the BasicOperate formatGabe Black
--HG-- extra : convert_revision : f02da702ab9b99da124fac7e10a07386b04f3a0f
2007-02-28Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32 --HG-- extra : convert_revision : 88d1401f6e6b7c82344abef2c81b3c22bf6a0499
2007-02-28Make trap instructions always generate TrapInstruction Fault objects which ↵Gabe Black
call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running. --HG-- extra : convert_revision : ea873f01c62234c0542f310cc143c6a7c76ade94
2007-02-28The "hostname" variable isn't used in the process classes. It should be ↵Gabe Black
removed from the other ones as well. --HG-- extra : convert_revision : 0c07534de42d6c32ac26d9e43709111e3ab30d57
2007-02-26Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem --HG-- extra : convert_revision : 7e8c3572ede7d93910fc3e2a2e76d9a38b1f4243
2007-02-24Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : a4f80ce975a23ba9858e6bf2dbbfed8897dd1810
2007-02-24make m5 readfile work on solaris... we can have a solaris regression soon!Ali Saidi
src/arch/sparc/isa/decoder.isa: add readfile and break to sparc decoder src/arch/sparc/isa/operands.isa: fix O0-O5 operands registers util/m5/Makefile.sparc: Make sparc makefile compile a 64bit binary util/m5/m5.c: readfile was in here twice, once will be sufficient I think util/m5/m5op_sparc.S: implement readfile and debugbreak --HG-- extra : convert_revision : 139b3f480ee6342b37b5642e072c8486d91a3944
2007-02-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem --HG-- extra : convert_revision : e0eb0240848698496bd55093a313eb2e0f512ebc
2007-02-23Ali and I both made the same change and we only need it once. I liked mine a ↵Gabe Black
little better. --HG-- extra : convert_revision : 3a1b7856e6143ca089fd6e36492608377dfede19
2007-02-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32 --HG-- extra : convert_revision : a7697ea8457a03318e3fcf34775bf3ecc4786e8a
2007-02-22Merge zizzer:/bk/newmemAli Saidi
into pb15.local:/Users/ali/work/m5.newmem --HG-- extra : convert_revision : 887b278dac6db5ea17ade641de84d0ab8b05db96
2007-02-22Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32 --HG-- extra : convert_revision : 70dcd9d1d669c1c619411389487b7910861550e3
2007-02-22Make the m5 pseudo instructions only work in FS. Also, make sure any ↵Gabe Black
undefined opcodes in impdep2 (which in SE is all of them) trap with an illegal_instruction exception. --HG-- extra : convert_revision : dd7848d0685e4cc6f5fd5e3b846a3f70b62ee30a
2007-02-21Make it easier to turn off the remote debuggerNathan Binkert
--HG-- extra : convert_revision : d88784736df5f9b498770fb7e98f52715669c0e1
2007-02-22Merge zizzer:/bk/newmemAli Saidi
into pb15.local:/Users/ali/work/m5.newmem --HG-- extra : convert_revision : e0057583132ce545eb1867b446484e8984b97282
2007-02-21Get rid of the ConsoleListener SimObject and just fold theNathan Binkert
relevant code directly into the SimConsole object. Now, you can easily turn off the listen port by just specifying 0 as the port. --HG-- extra : convert_revision : c8937fa45b429d8a0728e6c720a599e38972aaf0
2007-02-22fix se compiling oopsAli Saidi
--HG-- extra : convert_revision : ce7ac94da0ed6bad457a8a9e4c949b0c3b09c2ae
2007-02-21Make sure that all variables in the NSGigE device model areNathan Binkert
initialized. --HG-- extra : convert_revision : b4b156ed8e3c0c4c4f8043ff86dc232ebad38668
2007-02-21Make comments refer to ticks not cyclesNathan Binkert
--HG-- extra : convert_revision : 4970a76890a3256073423a827dd0c55cfcb19a08
2007-02-21Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 4105ebbeca59206bece27f229ee810d594fb4310
2007-02-21add pseduo instruction support for sparcAli Saidi
util/m5/Makefile.alpha: Clean up to make it a bit easier to muck with util/m5/Makefile.alpha: Make the makefile more reasonable util/m5/Makefile.alpha: Remove authors from copyright. util/m5/Makefile.alpha: Updated Authors from bk prs info util/m5/Makefile.alpha: bk cp Makefile Makefile.alpha src/arch/sparc/tlb.cc: Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate src/arch/alpha/isa/decoder.isa: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: Rename AlphaPseudo -> PseudoInst since it's all generic src/arch/sparc/isa/bitfields.isa: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/includes.isa: src/arch/sparc/isa/operands.isa: Add support for pseudo instructions in sparc util/m5/Makefile.alpha: util/m5/Makefile.sparc: split off alpha make file and sparc make file for m5 app util/m5/m5.c: ivle and ivlb aren't used anymore util/m5/m5op.h: stdint seems like a more generic better fit here util/m5/m5op_alpha.S: move the op ids into their own header file since we can share them between sparc and alpha --HG-- rename : util/m5/Makefile => util/m5/Makefile.sparc rename : util/m5/m5op.S => util/m5/m5op_alpha.S extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
2007-02-21Fix compile issues on gcc 4.1.x related to namespaces.Nathan Binkert
This basically involves moving the builder code outside of any namespace. While we're at it, move a few braces outside of a couple #if/#else/#endif blocks so it's easier to match up the braces. --HG-- extra : convert_revision : a7834532aadc63b0e0ff988dd5745049e02e6312
2007-02-21Fix tracing so it starts right away if --trace-start is notNathan Binkert
specified. --HG-- extra : convert_revision : 49c1ea0b8c313949124aed84b1055db0b3c55bd8
2007-02-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem --HG-- extra : convert_revision : bab45577db1967de1dd88ec9b228f106a4ab7479
2007-02-21Automatically generate m5/internal/__init__.py and swig/init.ccNathan Binkert
based on the swig modules that we have --HG-- extra : convert_revision : 2fd12db39d46608a62b9df36c2b36189f1d2bc30
2007-02-21Fix majory brokenness in my previous MySQL commit, basicallyNathan Binkert
this is just a shuffling around of code and fixes to make stuff commit properly --HG-- extra : convert_revision : a057f7fe4962cfc6200781ff66d2c26bf9c6eb8c
2007-02-21#include needed for compileNathan Binkert
--HG-- extra : convert_revision : fda9ab0d04f77f27810018a8639d6ea8abb59326
2007-02-21Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem tests/long/30.eon/ref/alpha/linux/simple-timing/m5stats.txt: "Hand merge" that just used the local file. --HG-- extra : convert_revision : 24c7fa192094958be5a9d17c3461f3328079fd3b
2007-02-21Update 50.vortex simple-timing for 8k blk_sizeGabe Black
--HG-- extra : convert_revision : 73f8c4f8f6da901021ea38e5ac053d905454a3ff
2007-02-21Update 50.vortex simple-atomic for 8k blk_sizeGabe Black
--HG-- extra : convert_revision : 82a131bf16b856dadf62a678ce74350079433692
2007-02-21Update 40.perlbmk simple-timing for 8k blk_sizeGabe Black
--HG-- extra : convert_revision : 461751061dc5db076f11e9c3b37da25cc47c583e
2007-02-21Update 40.perlbmk simple-atomic for 8k blk_sizeGabe Black
--HG-- extra : convert_revision : 135274a64ead4962faa4f34b2df4e9de453cbe7f
2007-02-21Update 30.eon simple-timing for 8k blk_size. It's strange this is necessary ↵Gabe Black
because simple-atomic doesn't seem affected. --HG-- extra : convert_revision : 6a8c77f0ca76eb06ac7eb5216af6adba3759c4c7
2007-02-18Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 10d4dc08411c7a433a7194e94f69ca1d639a1ce7
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-23 05:10:17 +0000