Age | Commit message (Collapse) | Author |
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cpu/exec_context.cc:
sim/system.cc:
sim/system.hh:
serialization for binning
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choose them at the .ini stage rather than at compile time.
to do it:
in .ini file set binned_fns=foo null bar foo
what this says is, track foo when it is called by null (i.e. anything). bin bar only when it is called by foo.
essentially, if you have a path of functions to track, the 0th, 2nd, 4th fn listed are the fns to track, and the 1st, 3rd, 5th are their respective callers.
base/statistics.hh:
turn it back to FS_MEASURE since we already have a build in place
kern/tru64/tru64_events.cc:
remove FS_MEASURE #defs. add more DPRINTF's. manage an anomaly that happens when tracking idle_thread.
kern/tru64/tru64_events.hh:
remove FS_MEASURE #defs
kern/tru64/tru64_system.cc:
make DumpState print all the time, but only with DPRINTF. add a new parameter to tru64System a vector<string> binned_fns, to read in from .ini file. now all this binning stuff is dynamically generated.
kern/tru64/tru64_system.hh:
remove all static binning stuff, add support for dynamic
sim/system.cc:
change nonPath bin name to Kernel, remove FS_MEASURE
sim/system.hh:
change nonPath to Kernel
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arch/alpha/isa_desc:
Reenable copies.
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arch/alpha/isa_desc:
Need to return fault for copy operations.
cpu/exec_context.hh:
Add temporary storage to pass source address from copy load to copy store
cpu/simple_cpu/simple_cpu.cc:
Implement copy functions.
cpu/simple_cpu/simple_cpu.hh:
Return fault
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the header, and fix so that it doesn't keep requesting the payload bus
if the sendRequest was unsuccesful.
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and to free up the header bus by returning false. If there is no
header splitting it will work normally.
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of stats
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The two busses are labeled header/payload. The header_size
designates the number of cache blocks to send on the header bus.
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take time
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we switch over to making ticks represent time directly.
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to memory in different configurations
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest
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cpu/base_cpu.cc:
#ifdef FULL_SYSTEM
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arch/alpha/isa_desc:
Just to make sure, remove the new copy instructions until everything works.
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data DMAs from touching the memory system. They can
still have a latency though if configured.
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cpu/base_cpu.cc:
gah! copy the interrupt status on switchover
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into zizzer.eecs.umich.edu:/.automount/ziff/z/binkertn/research/m5/latest
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code.
base/statistics.hh:
We're getting rid of FS_MEASURE, but for now, we're going
to still use a compile time flag to turn on and off binning
of statistics. (The flag is STATS_BINNING)
cpu/exec_context.cc:
cpu/exec_context.hh:
kern/tru64/tru64_system.cc:
get rid of FS_MEASURE
cpu/simple_cpu/simple_cpu.cc:
yank the function call tracking code out of the cpu and move
it into the software context class itself.
kern/tru64/tru64_system.hh:
get rid of FS_MEASURE
move all of the tacking stuff to the same place.
sim/system.hh:
cleanup
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into ziff.eecs.umich.edu:/z/binkertn/research/m5/latest
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base/trace.cc:
code to set/clear/print trace flags from the debugger.
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vary in size, so we're explicit about the fields.
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dev/alpha_console.cc:
setAddrRange -> addAddrRange
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arch/alpha/ev5.cc:
actually implement the cycle count register
arch/alpha/isa_desc:
the rpcc instruction really just reads the cycle count
register
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arch/alpha/ev5.cc:
Handle writing IPR_CC and IPR_CC_CTL slightly more intelligently.
(Very slightly).
arch/alpha/isa_desc:
Upper half of rpcc result comes from value written
to IPR_CC, not actual cycle counter.
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arch/alpha/isa_desc:
Add copy_load and copy_store insts (ldf and stf respectively)
cpu/simple_cpu/simple_cpu.hh:
Add copy functions to SimpleCPU as well
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arch/alpha/osfpal.cc:
Add a string for copypal.
arch/alpha/osfpal.hh:
Add a code for copypal.
cpu/static_inst.hh:
Add an IsCopy flag.
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the request locally until it is retransmitted.
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it actually do something on FullCPU. Still disabled, as it
causes detailed-boot to hang when you turn it on.
arch/alpha/isa_desc:
Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst.
cpu/simple_cpu/simple_cpu.hh:
Changed prefetch() return type from Fault to void.
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won't accidentally be issued to the memory system.
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