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2006-11-08Merge zizzer:/bk/newmemLisa Hsu
into zed.eecs.umich.edu:/z/hsul/work/m5/newmem --HG-- extra : convert_revision : 5f4b39beba9f672ba1741cb45f4c3cf853ce574b
2006-11-08Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : 643e28482e6739bd264a9c2d69c17279853aa0c5
2006-11-08DWARF2 symbol support seems to be broken on Solaris. Use stabs+Ali Saidi
align the character arrays that are used by placement-new for classes lest we have an unaligned fault on SPARC/Solaris src/SConscript: DWARF2 symbol support seems to be broken on Solaris. Use stabs+ src/base/statistics.hh: align the character arrays that are used by placement-new for classes lest we have an unaligned fault on SPARC/Solaris --HG-- extra : convert_revision : bc875a4fdfb4553062d3278537bc32a5ab9b6cca
2006-11-08simplify maxtick parsing in both the python and the c++.Lisa Hsu
configs/common/Simulation.py: simplify maxtick code a little bit - instead of checking for -1, just set it at MaxTick. src/python/m5/__init__.py: make a new m5 param called MaxTick. src/sim/host.hh: fix the M5 def. of MaxTick src/sim/main.cc: Simplify the MaxTick/num_cycles parsing within main.cc --HG-- extra : convert_revision : f800addfbc1323591c2e05b892276b439b671668
2006-11-08make rcS files read from the m5 source directory, not /dist.Lisa Hsu
--HG-- extra : convert_revision : 45a2dbf5b05b19dd60fbc3a5b10e9355c8351e3b
2006-11-08change to os.path.join like nate wanted.Lisa Hsu
--HG-- extra : convert_revision : 6e8a0153adf04f0cc07904434e4cb6a83fe900eb
2006-11-08Remove mem parameter. Should have been removed earlier.Kevin Lim
src/python/m5/objects/BaseCPU.py: These parameters should have been removed in an earlier push. --HG-- extra : convert_revision : 781b39ca370361e9568b1af0be96ff5848b1f3f4
2006-11-08Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : 29426cebe81ac077c1a83f50e914ff6955ce81d4
2006-11-08Update refs.Kevin Lim
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: Update config. tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr: Update ref. --HG-- extra : convert_revision : ca4fe7ff5bf9fcd112b703b88a5196a312c594ab
2006-11-07add code to operate in lockstep with legionAli Saidi
src/python/m5/main.py: add option to operate in lockstep with legion --HG-- extra : convert_revision : 2cc90ec0cf7e8d028ee813c2034a77415671a628
2006-11-07Fix error message.Kevin Lim
--HG-- extra : convert_revision : 7ac0f40595c89b0d9352e82e447d25380b038408
2006-11-07Fix up bus draining and add draining to the caches.Kevin Lim
src/mem/bus.cc: Fix up draining to work properly. src/mem/bus.hh: Initialize drainEvent to NULL. src/mem/cache/base_cache.cc: src/mem/cache/base_cache.hh: Add draining to the caches. --HG-- extra : convert_revision : 3082220a75d50876f10909f9f99bec535889f818
2006-11-07Remove hack by setting configuration better.Kevin Lim
src/dev/isa_fake.cc: src/dev/isa_fake.hh: No need for specialized init() function any more. src/python/m5/objects/Tsunami.py: Override responder when set by user. This avoids having bus.responder floating around and not doing anything when the user has specified their own default responder. --HG-- extra : convert_revision : c547daf15b23a889c98e62bfd53c293c85d7a041
2006-11-07Fix compile error.Kevin Lim
--HG-- extra : convert_revision : a4c4195bc07383149a56907f26d327a4bfa77c26
2006-11-07Initialize mem dep unit properly.Kevin Lim
src/cpu/o3/mem_dep_unit_impl.hh: Initialize mem dep unit properly, add debug output. --HG-- extra : convert_revision : 3c56dedfa57de1edc4b1c8f8d9bc94e18002eff2
2006-11-06delete pcifake, tsunamifake. Combine BadAddr/IsaFake into oneAli Saidi
src/SConscript: remove pcifake and tsunami fake from sconscript src/dev/isa_fake.cc: src/dev/isa_fake.hh: combine badaddr and isa fake into one src/python/m5/objects/Pci.py: remove pcifake src/python/m5/objects/Tsunami.py: make badaddr derive from isafake --HG-- extra : convert_revision : 91470db60aa1de6b85827304e27bd3414cc9d8d1
2006-11-06Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : f77e5cf8cc5b99960d28e1cc109d140f1013cfca
2006-11-06small fixes for solarisAli Saidi
--HG-- extra : convert_revision : 3546b2cecf7e7e8e62295abc1ed08b3b6d2b0a8b
2006-11-06Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem --HG-- extra : convert_revision : d6bb87586cf7ee63ca32e36944c3755fae0b55d0
2006-11-06Clean up clock phase drift code a bit.Kevin Lim
src/cpu/base.cc: Move clock phase drift code to the base CPU so that any CPU model can use it. src/cpu/base.hh: Added two functions to help get the next cycle the CPU should be scheduled. src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: Use the function now in BaseCPU. --HG-- extra : convert_revision : 444494b66ffc85fc473c23f57683c5f9458ad80c
2006-11-06replace NULL with 0.... Why isn't NULL defined by default on Mac OS X I ↵Ali Saidi
don't know --HG-- extra : convert_revision : b60403445bd4e855732fd4e6753068abd90ecc9d
2006-11-05Update refs.Kevin Lim
--HG-- extra : convert_revision : 61d298fb0d9a66a76209a6bfcdb7c14f2efca947
2006-11-05Initialize pointer to NULL.Kevin Lim
src/cpu/o3/lsq_unit_impl.hh: Be sure to initialize pointer to NULL. --HG-- extra : convert_revision : 917d5119e4bd8eae10959ed07069d8c694315c7a
2006-11-04Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : d7133e32cfca9f15869ee9ab7a93e3470e7d9038
2006-11-04fixes so that M5 will compile under solarisAli Saidi
SConstruct: Add check to see if we need to include libsocket src/arch/sparc/floatregfile.cc: src/arch/sparc/intregfile.cc: use memset rather than bzero and include the appropriate headerfile src/base/pollevent.cc: If we're compling under solaris we need sys/file.h src/base/random.cc: src/base/random.hh: solaris doesn't have random(), so use rint with the correct rounding mode if we're compiling on solaris src/base/stats/flags.hh: u_int32_t?? src/base/time.hh: grab the timersub() define from freebsd since it doesn't exist in solaris src/cpu/inst_seq.hh: we don't need to include stdint here src/sim/byteswap.hh: the method to detect endianness on Solaris is a little more complex... --HG-- extra : convert_revision : 6b7db0e900e7bccfc250d65c125065f27280dda1
2006-11-02Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix --HG-- extra : convert_revision : a9a41e2c292bd95aa148e1cf4d9a77c0622a462b
2006-11-02Have bus use the BadAddress device to handle bad addresses. The O3 CPU ↵Kevin Lim
should be able to boot into Linux with caches on after this change. src/mem/bus.cc: src/mem/bus.hh: Bus now will be setup with a default responder, unless the user overrides it. This default responder should return BadAddress if no matching port is found. src/python/m5/objects/Bus.py: Bus now has a default responder for FS mode if the user doesn't override it. It returns BadAddress if no matching port is found. src/python/m5/objects/Tsunami.py: Add bad address device. Also record when the user has specified their own default responder. --HG-- extra : convert_revision : 59070477ae313ee711b2d59baa2369c9a91c5b85
2006-11-02Implement device that will return BadAddress.Kevin Lim
--HG-- extra : convert_revision : d833c20f691e01c84a0678f19f7d83f3ee50c0c1
2006-11-02Caches return a new functional port whenever asked for one.Kevin Lim
src/mem/cache/base_cache.cc: Have caches return a new functional port whenever asked for them. I'm pretty sure this is desired behavior. Ron can correct me if it's not. --HG-- extra : convert_revision : e1fadf895a7d714968128ff900d10e86fde53387
2006-11-02More proper handling of the ports.Kevin Lim
src/cpu/simple_thread.cc: Fix up port handling to share code. src/cpu/thread_state.cc: Separate code off into a function. src/cpu/thread_state.hh: Make a separate function that will get the CPU's memory's functional port. --HG-- extra : convert_revision : 96a9bb3c5e4b9ba5511678c0fd17f0017c8cd312
2006-11-02Remove function that should have been deleted.Kevin Lim
src/cpu/simple_thread.cc: This function should have been deleted from an earlier push. src/cpu/simple_thread.hh: Delete this function; it's now in thread_state.hh/.cc. --HG-- extra : convert_revision : f78dcf9c2b388418030d48d0ea4911c8b8b1f5ff
2006-11-02Use ISA specific makeExtMI.Kevin Lim
src/arch/alpha/utility.hh: For now makeExtMI will be specific to the ISA. --HG-- extra : convert_revision : 89959c6499efcc3df9301ad8ea039580764a1496
2006-11-01Merge zizzer:/bk/newmemLisa Hsu
into zed.eecs.umich.edu:/z/hsul/work/m5/newmem --HG-- extra : convert_revision : a30e2da1f0a272b8c867c0e7a3491118be92bc5e
2006-11-01factor some more commone code and enable going from checkpoint into ↵Lisa Hsu
arbitrary CPU with or without caches. configs/common/Simulation.py: enable going from checkpoint into arbitrary CPU with or without caches. --HG-- extra : convert_revision : 02e7ff8982fdb3a08bc609f89bd58df5b3a581b2
2006-11-01Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops --HG-- extra : convert_revision : c2f7398a0d14dd11108579bb243ada7420285a22
2006-11-01Added code to handle draining.Gabe Black
--HG-- extra : convert_revision : 3861f553bde5865cd21a8a58a4c410896726f0a3
2006-11-01Fix a range check on the ipr_index.Gabe Black
--HG-- extra : convert_revision : 84e25abd4bb2de0c877c883804d39feb019c7030
2006-11-01Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register ↵Gabe Black
file functions to not take faults --HG-- extra : convert_revision : 1cef0734462ee2e4db12482462c2ab3c134d3675
2006-11-01make it so that you can do a standard switch without the caches option. ↵Lisa Hsu
this will have only the o3 cpu have a cache, rather than timing (warmup) + o3 have cache. --HG-- extra : convert_revision : d733de7ebb362bbd7376a0235ee7f117df2d6d37
2006-11-01change name of 2nd switch_cpu so that ckpt recovery with multiple cpus ↵Lisa Hsu
doens't get confused. --HG-- extra : convert_revision : 16c710c4196c520d03c1993a26f38cf1f04ab637
2006-10-31Arg!Gabe Black
--HG-- extra : convert_revision : 8328d002780c0291e7eb264076a62084de88b7a5
2006-10-31More typos! I need to get nfs to work.Gabe Black
--HG-- extra : convert_revision : f5693e96d376254f777fb0cce7b5be3d36efbea9
2006-10-31Fix another typoGabe Black
--HG-- extra : convert_revision : ad7058babf2a13bfe543e05f2662dc49a18a8b8b
2006-10-31Check for out of range IPR values as well.Gabe Black
--HG-- extra : convert_revision : 9ca241bb71d8a1d022e54485383a88d2abece663
2006-10-31Fix stupid typoGabe Black
--HG-- extra : convert_revision : fbfc82974e89b2c726b689674c9f5d957682b280
2006-10-31Make two simple utility functions to determine if a MiscReg index ↵Gabe Black
corresponding to an IPR is readable or writable. --HG-- extra : convert_revision : 89eebba5eec01e629213997d24c734a6acad0ecb
2006-10-31Forgot to add intr_flag in one place.Gabe Black
--HG-- extra : convert_revision : 637256098e2283c18f98bdaabf21f3039d162a15
2006-10-31We don't include ipr.cc in SE builds, so don't call it.Gabe Black
--HG-- extra : convert_revision : 45e52d7afbf74e0ddde11f58aeb084186389fc06
2006-10-31Made the old name refer to the miscreg index to prevent having to change ↵Gabe Black
code all over the place. --HG-- extra : convert_revision : e890a3ce420336acdb220396dcbf66d4b9974c76
2006-10-31Forgot to change the index.Gabe Black
--HG-- extra : convert_revision : 5a444e635d20bcca445a10e43592b6c10d25e879
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