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2006-12-06Flattening and syscallReturn fixesGabe Black
src/cpu/o3/thread_context_impl.hh: Use flattened indices src/cpu/simple_thread.hh: Use flattened indices, and pass a thread context to setSyscallReturn rather than a register file. src/cpu/thread_context.hh: The SyscallReturn class is no longer in arch/syscallreturn.hh --HG-- extra : convert_revision : ed84bb8ac5ef0774526ecd0d7270b0c60cd3708e
2006-12-06Don't panic, but this needs to be fixed.Gabe Black
--HG-- extra : convert_revision : 7a4aed238d437dbb2cc5946b3045d53697070a27
2006-12-06Make syscalls flatten their register indices, and also call into the ISA's ↵Gabe Black
setSyscallReturn function rather than having a duplicated one. --HG-- extra : convert_revision : 1e83ef629a7fd143f2e35e68abaa56f81d6b9d9e
2006-12-06Change rename to rename the flattened register index instead of the ↵Gabe Black
architectural one. --HG-- extra : convert_revision : 757866ad7a3c8be7382e1ffa71c60bc00c861f6f
2006-12-06Added in endianness conversion on memory accesses as the data goes out. This ↵Gabe Black
will break the checker! --HG-- extra : convert_revision : b8191cab09ab8f3ced05693293f058382319ed8e
2006-12-06Change how optional delay slot instructions are detected and squashed.Gabe Black
--HG-- extra : convert_revision : ffd019d4adc2fbbc0a663d8dc6ef73edce12511b
2006-12-06Get rid of some typedefs which were hardly used, and move some stuff back ↵Gabe Black
here that shouldn't be in the architecture specific DynInst classes. --HG-- extra : convert_revision : dad0d7191acf773c16dc3ed9dd911f5e8bfc08b3
2006-12-06Change to use -return_value.value like other implementations.Gabe Black
--HG-- extra : convert_revision : 513422c1c8c24f3662e6a423d13ee033424aa44b
2006-12-06Some changes for misc regs which were changed into unofficial integer ↵Gabe Black
registers, and moved the flattenIndex function into the register file. --HG-- extra : convert_revision : 6b797c793a6c12c61a23f0f78a1ea1c88609553e
2006-12-06Reorganize the includes and add an include for misc.hh.Gabe Black
--HG-- extra : convert_revision : 484b2d07a1e8b3879c35d80bf16b73fd0cc9be1f
2006-12-06Added some debug output, and made sure not to accidentally ask for the ↵Gabe Black
result of a store conditional. --HG-- extra : convert_revision : d36ff9e2343fdf78a3bc16a1348975fdba5c55e2
2006-12-06Some basic fix ups, and CWP is no longer set explicitly.Gabe Black
--HG-- extra : convert_revision : 1dde5594a2bcfd9fb5ad974360b3dc035f1624e5
2006-12-06Changed the integer register file to work with flattened indices.Gabe Black
--HG-- extra : convert_revision : c5153c3c712e5d18b5233e1fd205806adcb30654
2006-12-06Change MIPS's setSyscallReturn to use a thread context.Gabe Black
--HG-- extra : convert_revision : 618f8404ec5380615e28170d761b2fcdf9c07d96
2006-12-06Added basic flatten function for mips.Gabe Black
--HG-- extra : convert_revision : 2c32851584001734d139f36c4d58c5e61067fcfc
2006-12-05Move the SyscallReturn class into sim/syscallreturn.hh. Also move some ↵Gabe Black
miscregs into the integer register file so they get renamed. src/arch/alpha/syscallreturn.hh: src/arch/mips/syscallreturn.hh: src/sim/syscallreturn.hh: Move the SyscallReturn class into sim/syscallreturn.hh src/arch/sparc/faults.cc: src/arch/sparc/isa/operands.isa: src/arch/sparc/isa_traits.hh: src/arch/sparc/miscregfile.cc: src/arch/sparc/miscregfile.hh: src/arch/sparc/process.cc: src/arch/sparc/sparc_traits.hh: Move some miscregs into the integer register file so they get renamed. --HG-- extra : convert_revision : df5b94fa1e7fdca34816084e0a423d6fdf86c79b
2006-11-24Initial changes to get O3 working with SPARCGabe Black
src/arch/sparc/process.cc: MachineBytes doesn't exist any more. src/arch/sparc/regfile.cc: Add in the miscRegFile for good measure. src/cpu/o3/isa_specific.hh: Add in a section for SPARC src/cpu/o3/sparc/cpu.cc: src/cpu/o3/sparc/cpu.hh: src/cpu/o3/sparc/cpu_builder.cc: src/cpu/o3/sparc/cpu_impl.hh: src/cpu/o3/sparc/dyn_inst.cc: src/cpu/o3/sparc/dyn_inst.hh: src/cpu/o3/sparc/dyn_inst_impl.hh: src/cpu/o3/sparc/impl.hh: src/cpu/o3/sparc/params.hh: src/cpu/o3/sparc/thread_context.cc: src/cpu/o3/sparc/thread_context.hh: Sparc version of this file. --HG-- extra : convert_revision : 34bb5218f802d0a1328132a518cdd769fb59b6a4
2006-11-24Merge zower:/eecshome/m5/newmemGabe Black
into ewok.(none):/home/gblack/m5/newmemo3 --HG-- extra : convert_revision : e8d6ce19a83fe526112c1dd61c48196eb8c0951f
2006-11-24Merge zizzer:/bk/newmemGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 7dbd30ce5579dd62d5f54bb5d75cf12346bc5d1d
2006-11-24Rename this function.Gabe Black
--HG-- extra : convert_revision : 57ea1e1d3b75e35abb3310d392ec70086fff699a
2006-11-24Fix weird type modifier.Gabe Black
--HG-- extra : convert_revision : 7372b7a92b3c9d05388acb43ba58ada18464fa24
2006-11-24Fix an include problem.Gabe Black
--HG-- extra : convert_revision : 89be55bd3f4f9b452a680a98b69ce42b80546769
2006-11-24Add no-op versions of ivlb and ivle back in for backwards compatibility.Steve Reinhardt
--HG-- extra : convert_revision : 383b72c130b20f3d7cde4e08fa36a481f3c0bf7c
2006-11-23Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head --HG-- extra : convert_revision : 154bc605c62b1e51c32e65916d4c2eda3a3f22fd
2006-11-23Use the right constant.Gabe Black
--HG-- extra : convert_revision : f93182ed41057025cc10df443b24e82fbe783df6
2006-11-23Fixes to the isa description.Gabe Black
src/arch/sparc/isa/base.isa: Fix a constant. src/arch/sparc/isa/decoder.isa: Made carry calculation more consistent. src/arch/sparc/isa/operands.isa: Use the right constant. --HG-- extra : convert_revision : 25b3a09ff20d4b8e1a95ee8a983d14ef3cfe73bb
2006-11-22Moved some constants from isa_traits.hh to the reg file headers.Gabe Black
--HG-- extra : convert_revision : 378b2d9791e6282539900a2261ad2275d726b4be
2006-11-22Added a parameter to set memory to zero. This is to support Legion, and once ↵Gabe Black
we can make our own hypervisor binary, we probably won't need it. --HG-- extra : convert_revision : 168883e4a5d3760962cd9759a6f41c66f5a6402a
2006-11-22Do a functional access to levels above on a read as a temporary solution for ↵Ron Dreslinski
L2's in FS Fix a small writeback bug when missing in the L2 in atomic mode src/mem/bus.cc: Fix a comment to make sense src/mem/cache/cache_impl.hh: Do a functional access to levels above on a read as a temporary solution for L2's in FS Also fix a small writeback miss in L2 issue src/mem/cache/coherence/simple_coherence.hh: src/mem/cache/coherence/uni_coherence.cc: src/mem/cache/coherence/uni_coherence.hh: Do a functional access to levels above on a read as a temporary solution for L2's in FS tests/quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: Update ref's for writeback changes --HG-- extra : convert_revision : 937febd577b16b7fd97a5a68acaf53541828a251
2006-11-22Merge zizzer:/bk/sparcfsGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 75f3398e38e18eb1f8248e23708d7a8d8cce0fc5
2006-11-20Fix an assert to correctly make sure a request falls entirely inside a memory.Gabe Black
--HG-- extra : convert_revision : 71cf02edffbc7029666c0d9c97b67e1d32332758
2006-11-20Add in checks of more Legion based state, and put in more sophisticated ↵Gabe Black
formatting functions. --HG-- extra : convert_revision : e3aa5919a6480aa01924c832a86fa1e8ddf5ba0d
2006-11-20Make sure only real bits of pstate can be set.Gabe Black
--HG-- extra : convert_revision : 8707bbed2aeb80613f86503e92b63853767adaa9
2006-11-20Set the pstate.priv bit to 1 in hyperpriveleged mode. The description in the ↵Gabe Black
manual of what happens during a trap says it should be 0, and other places say it doesn't matter. --HG-- extra : convert_revision : 9ecb6af06657e936a208cbeb8e4a18305869b949
2006-11-20Add in rom/rams for the nvram, hypervisor description, and partition ↵Gabe Black
description. --HG-- extra : convert_revision : a49de5fcfbea307c971964b8a68b95eb5d9a2bf4
2006-11-20Fix typo.Kevin Lim
--HG-- extra : convert_revision : 2dd830c6b3b5df894608b7596250b0181a3dfdf0
2006-11-19Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemSteve Reinhardt
into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head --HG-- extra : convert_revision : c2b7784377d85df5b8ee39c891cd3da9907410d8
2006-11-19Update Virtual and Physical ports.Kevin Lim
src/cpu/o3/alpha/cpu_impl.hh: Handle the PhysicalPort and VirtualPort in the ThreadState. src/cpu/o3/cpu.cc: Initialize the thread context. src/cpu/o3/thread_context.hh: Add new function to initialize thread context. src/cpu/o3/thread_context_impl.hh: Use code now put into function. src/cpu/simple_thread.cc: Move code to ThreadState and use the new helper function. src/cpu/simple_thread.hh: Remove init() in this derived class; use init() from ThreadState base class. src/cpu/thread_state.cc: Move setting up of Physical and Virtual ports here. Change getMemFuncPort() to connectToMemFunc(), which connects a port to a functional port of the memory object below the CPU. src/cpu/thread_state.hh: Update functions. --HG-- extra : convert_revision : ff254715ef0b259dc80d08f13543b63e4024ca8d
2006-11-17Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 1fc55d7d5707bb7c63790aab306ca5ea8ade5fab
2006-11-17Make an initialization pass for the thread context and set the ↵Ron Dreslinski
[phys,virt]Port correctly src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: Call the thread context initialization --HG-- extra : convert_revision : d7dc2a8b893dc670077b7f6150d4b710a1778620
2006-11-16add warn_once which will print any given warning messageNathan Binkert
only once. --HG-- extra : convert_revision : b64bb495c1bd0c4beb3db6ca28fad5af4d05ef8e
2006-11-16Implement a single config file to encompass all of the SPECNathan Binkert
CPU2000 stuff, and use it in all of the tests that currently use SPEC --HG-- extra : convert_revision : 8cd26a597e51a90b6d2810d344a075f5aa0f011b
2006-11-16implement RUSAGE_CHILDREN for getrusage since it's trivialNathan Binkert
--HG-- extra : convert_revision : bc12b3b2e9ee02f42c437cbc20680ea00e19a801
2006-11-16Implement current working directory for LiveProcessesNathan Binkert
--HG-- extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
2006-11-16Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemopsGabe Black
into zower.eecs.umich.edu:/eecshome/m5/newmem --HG-- extra : convert_revision : 74b2352b8f088e38cd1ecf3a8233b45df0476d93
2006-11-16Merge zizzer.eecs.umich.edu:/bk/newmem/Gabe Black
into zower.eecs.umich.edu:/home/gblack/m5/newmemmemops --HG-- extra : convert_revision : c49b760eac758dbde30867cb638fcb3b790f4721
2006-11-16Fixes for SPARC_FSGabe Black
configs/common/FSConfig.py: Make a SPARC system create an IO bus. src/python/m5/objects/T1000.py: Create a T1000 platform src/arch/sparc/miscregfile.cc: Initialize the strand status register to the value legion provides. src/cpu/exetrace.cc: Truncate an ExtMachInst to a MachInst before comparing with Legion. --HG-- extra : convert_revision : e4189b572a5297e8362f5bd26d87b74736c8e5f1
2006-11-15Add L2 cache option to fs.py --l2cacheRon Dreslinski
--HG-- extra : convert_revision : 5bdd1129c3b23e91d441e7b83f6a824ef7740fab
2006-11-14Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 8d61b474428d494b1a5382e4cf95934ad54e35dd
2006-11-14Various fixes to delete packet and request a little better.Kevin Lim
src/cpu/simple/timing.cc: Various updates for deleting requests more properly. The major change is moving the deletion of the fetch request/packet to after the instruction has executed and completed. This should fix a few bugs because Ron's memory system didn't expect a call for a functional access while a timing access was being processed. --HG-- extra : convert_revision : c7cf114bb1ff3cdaa7b0a40ed4c5302dc9d3a522
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