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configs/test/fs.py:
update fs.py to use a bus bridge
cpu/simple/cpu.hh:
cpu should just return that it doesn't snoop any address ranges
python/m5/objects/System.py:
move boot_osflags to system
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or bridges without panicing
SConscript:
add new cc files to scons
mem/bus.cc:
mem/bus.hh:
implement addressRanges() on the bus.
propigate address ranges to anyone who is interested stripping out ranges of who your propigating to (to avoid livelock)
mem/packet.hh:
add intersect function that returns true if two packets touch at least one byte of the same data (for functional access)
add fixPacket() that will eventually take the correct action giving a timing and functional packet, right now it panics
mem/physical.cc:
Don't panic if the physical memory recieves a status change, just ignore.
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arch/alpha/system.hh:
sim/system.hh:
make boot_osflags apply to all systems
--HG--
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timing packets working and get sinic working
after merge from head. Checkpointing may need some work now. Endian-happiness still not complete.
SConscript:
add all devices back into make file
base/inet.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/pktfifo.cc:
dev/pktfifo.hh:
rename PacketPtr EthPacketPtr so it doesn't conflict with the PacketPtr type in the memory system
configs/test/fs.py:
add nics to fs.py
cpu/cpu_exec_context.cc:
remove this check, as it's not valid. We may want to add something else back in to make sure that no one can delete the
static virtual ports in the exec context
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
use new methods for accessing packet data
dev/ide_disk.cc:
add some more dprintfs
dev/io_device.cc:
delete packets when we are done with them. Update for new packet methods to access data
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
dev/uart8250.hh:
mem/physical.cc:
mem/port.cc:
dUpdate for new packet methods to access data
dev/ns_gige.cc:
Update for new memory system
dev/ns_gige.hh:
python/m5/objects/Ethernet.py:
update for new memory system
dev/sinic.cc:
dev/sinic.hh:
Update for new memory system. Untested as need to merge in head because of kernel driver differences between versions
mem/packet.hh:
Add methods to access data instead of accessing it directly.
--HG--
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SConscript:
compile ide devices
base/chunk_generator.hh:
add another parameter to the chuck generator called complete() which
returns the number of bytes transfered so far. Very useful for
adding to a pointer.
configs/test/fs.py:
Add ide disk to fs test configuration
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
update for new memory system
mem/bus.cc:
support devices that return multiple ranges
remove old ranges before using new info
mem/packet.hh:
make senderstate void* per steve's request that we use every
construct possible in C++
mem/physical.cc:
have memory stamp the packet with the time.
mem/physical.hh:
actually set the memory latency variable
python/m5/objects/Device.py:
Add DmaDevice
python/m5/objects/Ide.py:
Ide disk no longer has a physmem pointer
python/m5/objects/Pci.py:
update pci device for newmem
python/m5/objects/PhysicalMemory.py:
add latency parameter for physical memory
sim/byteswap.hh:
use fast architecture dependent byteswap calls if they exist
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into zeep.pool:/z/saidi/work/m5.newmem
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and maximum debugging in for debug target.
No such thing as -O5 in GCC, so might as well just use -O3
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into ewok.(none):/home/gblack/m5/newmem
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arch/alpha/isa/decoder.isa:
Fixed up Alpha to pass the syscall number directly to the syscall function.
arch/mips/isa/decoder.isa:
Fixed up MIPS to pass the syscall number directly to the syscall function.
arch/mips/isa/operands.isa:
Added an R2 operand which is passed to the syscall function as the syscall number to use.
--HG--
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arch/sparc/isa/base.isa:
Added a set of abbreviations for the different condition tests.
arch/sparc/isa/decoder.isa:
Fixes and additions to get syscall emulation closer to working.
arch/sparc/isa/formats/branch.isa:
Fixed branches so that the immediate version actually uses the immediate value
arch/sparc/isa/formats/integerop.isa:
Compute the condition codes -before- writing to the state of the machine.
arch/sparc/isa/formats/mem.isa:
An attempt to fix up the output of the disassembly of loads and stores.
arch/sparc/isa/formats/trap.isa:
Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions.
arch/sparc/isa/operands.isa:
Added an R1 operand, and fixed up the numbering
arch/sparc/isa_traits.hh:
SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc.
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in.
arch/sparc/process.cc:
arch/sparc/process.hh:
Fixed up how the initial stack frame is set up.
arch/sparc/regfile.hh:
Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
Changed the syscall mechanism to pass down the syscall number directly.
--HG--
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and the entire packet respectively.
--HG--
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of a load that missed in the cache.
Split mem ops will solve this problem in the future.
--HG--
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Floating Point Mips Tests still need to be added, tested, and debugged.
arch/mips/isa/decoder.isa:
Fix mult and multu instructions. This semantic error causes the problem: <int64> = <int32> * <int32>. Although I was placing
the output into a 64-bit integer the multiply was just doing a 32-bit multiply so the solution is to just use
the 'sd' & 'ud' operands so that the ISA parser will use the int64_t and uint64_t types in calculation.
arch/mips/isa/formats/int.isa:
Trace output fix. Don't print first comma unless there is a destination register for sure!
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--HG--
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container classes
Update MIPS/Linux constants
arch/alpha/linux/linux.hh:
move RLIMIT constants to ALPHA/Linux class
arch/alpha/tru64/tru64.hh:
move RLIMIT constants to ALPHA/Tru64 class
arch/mips/mips_linux.hh:
update MIPS constants for MIPS/Linux
kern/linux/linux.hh:
remove RLIMIT constants from generic Linux class... these are now in ISA specific / OS specific classes
kern/tru64/tru64.hh:
remove RLIMIT constants from generic Tru64 class... these are now in ISA specific / OS specific classes
--HG--
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--HG--
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<architecture>-<OS>.
This class is derived from the original <OS> class and is used to define information that
is both architecure and OS specific (for example, the AlphaLinux class is derived from the
Linux class and defined in arch/alpha/linux/linux.hh).
SConscript:
no need to compile linux.cc and tru64.cc now, since openFlagsTable has been moved
arch/alpha/SConscript:
compile linux.cc and tru64.cc within alpha arch.
arch/alpha/linux/process.cc:
template syscall functions on AlphaLinux instead of Linux ... AlphaLinux is derived off of Linux
arch/alpha/tru64/process.cc:
template syscall functions on AlphaTru64 instead of Linux ... AlphaTru64 is derived off of Linux
moved tableFunc syscall function into this file
arch/mips/SConscript:
compile mips_linux.cc for openFlags table
arch/mips/isa_traits.hh:
remove constants from here
arch/mips/linux_process.cc:
template syscall functions on MipsLinux instead of Linux ... MipsLinux is derived off of Linux
kern/linux/linux.hh:
remove OSFlags
kern/tru64/tru64.hh:
remove OSFlags def., openFlagTable, and tableFunc ...
sim/syscall_emul.hh:
go back to using "OS" instead of "OSFlags"
arch/alpha/linux/linux.cc:
defines openFlagTable
arch/alpha/linux/linux.hh:
arch/alpha/tru64/tru64.hh:
Alpha Linux constants placed here in class derived from Linux class
arch/alpha/tru64/tru64.cc:
defines openFlagTable for AlphaTru64
arch/mips/mips_linux.cc:
MIPS Linux open flag table
arch/mips/mips_linux.hh:
Mips Linux constants placed here in class derived from Linux class
--HG--
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into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
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Time to make the ide device work
arch/alpha/system.cc:
write the machine type and rev in the correct place
cpu/simple/cpu.cc:
reset the packet structure every time it's reused... wow the
simple cpu code for talking to memory is getting horrible.
dev/alpha_console.cc:
move the setAlphaAccess to startup() to make sure that the console
binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
More verbose bus tracing
mem/packet.hh:
Add a constructor to packet to set the result to unknown and a reset
method in the case it's being reused
mem/vport.hh:
don't need are own read/write methods since the base functional port
ones call writeBlob readBlob which do the translation for us
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into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips
--HG--
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these OSFlags to access architecture-specific AND OS-specific
flags for their functions (e.g. OS::OSFlags::TG_MAP_ANONYMOUS)...
arch/alpha/tru64/process.cc:
sim/syscall_emul.hh:
Add OSFlags to code
arch/mips/isa/decoder.isa:
slight decoder changes (more stylistic then anything)
arch/mips/isa/formats/util.isa:
spacing
arch/mips/isa_traits.hh:
add OSFlags struct to MipsISA namespace. The OS classes then use these OSFlags to access architecture-specific and OS-specific
flags for their functions
kern/linux/linux.hh:
remove constant placement ... define OSFlags in linux.hh
kern/tru64/tru64.hh:
define OSFlags in tru64
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Set locked flag if required
make SC always return success -- this needs to be fixed at some point
fix a couple of things
FS executes a bit of console code before dying a horrible death
arch/alpha/linux/system.cc:
only need to copy the length of the os flags param, not 256 bytes
cpu/simple/cpu.cc:
Set the physical flag if required
Make LL/SC always return success
mem/bus.cc:
add some dprintfs and change a assert to a panic
mem/port.cc:
delete the buffer with the [] operator
mem/request.hh:
add a function to reset a request
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into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
--HG--
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SConscript:
easier to fix than temporarily remove
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
mem needed for both fullsys and syscall
dev/baddev.cc:
fix for new mem system
dev/io_device.cc:
fix typo
dev/io_device.hh:
PioDevice needs to be a memobject
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
fix for new mem systems
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
rather than the platform have a pointer to pciconfig, go the other
way so all devices are the same and can have a platform pointer
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart8250.cc:
python/m5/objects/AlphaConsole.py:
python/m5/objects/BadDevice.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Device.py:
python/m5/objects/Pci.py:
python/m5/objects/PhysicalMemory.py:
python/m5/objects/System.py:
python/m5/objects/Tsunami.py:
python/m5/objects/Uart.py:
fixes for newmem
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into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips
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Will remove these in future merge but it is just way easier to keep all these tests in
their own repo folder so I wont have to reset these up every time I pull from bitkeeper
--HG--
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sim/syscall_emul.hh:
Clean up mmapFunc: args should be aligned and PageTable::allocate
already handles multi-page allocations, so most of thw work done here
was unnecessary (as far as I can tell). I didn't test this beyond
compiling though...
--HG--
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arch/mips/isa_traits.hh:
add FIR misc reg (was lost in merge)
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send range change at init for all devices
dev/io_device.cc:
dev/io_device.hh:
add init function for pio devices to sent status changes around
mem/physical.cc:
mem/physical.hh:
Panic if physical memory isn't connected to anything
--HG--
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into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
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SConscript:
compile some more devices
--HG--
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into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips
arch/mips/isa/formats/mem.isa:
Filled in Split-Memory Access Code
arch/mips/isa_traits.hh:
Leave IntRegFile as an array instead of class with member functions
mem/page_table.cc:
take out NO ALIGN FAULT page table access code for now... No need to messs up what works
--HG--
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arch/mips/isa/bitfields.isa:
add RS_SRL bitfield ...these must be set to 0 for a SRL instruction
arch/mips/isa/decoder.isa:
Make unimplemented instructions Fail instead of just Warn
Edits to SRA & SRAV instructions
Implement CFC1 instructions
Unaligned Memory Access Support (Maybe Not fully functional yet)
Enforce a more strict decode policy (in terms of different bitfields set to 0 on certain instructions)
arch/mips/isa/formats/branch.isa:
Fix disassembly
arch/mips/isa/formats/int.isa:
Add sign extend Immediate and zero extend Immediate to Int class.
Probably a bit unnecessary in the long run since these manipulations could
be done in the actually instruction instead of keep a int value
arch/mips/isa/formats/mem.isa:
Comment/Remove out split-memory access code... revisit this after SimpleCPU works
arch/mips/isa/formats/unimp.isa:
Add inst2string function to Unimplemented panic. PRints out the instruction
binary to help in debuggin
arch/mips/isa/formats/unknown.isa:
define inst2string function , use in unknown disassembly and panic function
arch/mips/isa/operands.isa:
Make "Mem" default to a unsigned word since this is MIPS32
arch/mips/isa_traits.hh:
change return values to 32 instead of 64
arch/mips/linux_process.cc:
assign some syscalls to the right functions
cpu/static_inst.hh:
more debug functions for MIPS (these will be move to the mips directory soon)
mem/page_table.cc:
mem/page_table.hh:
toward a better implementation for unaligned memory access
mem/request.hh:
NO ALIGN FAULT flag added to support unaligned memory access
sim/syscall_emul.cc:
additional SyscallVerbose comments
--HG--
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into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmem
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Constructor takes a bool to signify that it is either a cpu_request or not a cpu_request.
When accedding variables of a cpu_request it asserts that it is a cpu_request.
It also asserts that a value being read has been written at some point in time prior (not gaurnteeing it is up to date, but it was at least written before read).
There is also a isCpuReq() function to determine if this is a cpu_request. It should be called before accesing a cpu_request only variable.
SConscript:
Add compilation support for request.cc
arch/alpha/tlb.cc:
arch/alpha/tlb.hh:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/io_device.cc:
mem/page_table.cc:
mem/page_table.hh:
mem/port.cc:
Update for unified request object and accessor functions.
mem/request.hh:
Remove CpuRequest, make it a unified object. Make variables private with accessor functions.
May want to move things from .cc file into header (usually a assert() and either returning a value, or writting two).
--HG--
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into zeep.eecs.umich.edu:/z/saidi/work/m5.newmem
--HG--
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update for newmem
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/sparc/faults.cc:
arch/sparc/faults.hh:
added unimp faults for mips
arch/mips/isa/base.isa:
arch/mips/isa/includes.isa:
thou shalt not put includes inside a namespace
dev/alpha_console.cc:
fix formatting
dev/io_device.hh:
add comments
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
update for newmem
sim/process.cc:
fix seemingly wronge code.
--HG--
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arch/sparc/regfile.hh:
Added debug output to the setAltGlobals function.
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into ewok.(none):/home/gblack/m5/newmem
--HG--
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ALPHA_FS finally compiles again
SConscript:
Use a couple more FS sources, still don't compile that much
arch/alpha/faults.hh:
the unimp fault should probably exist in nonfs too.
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/simconsole.cc:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/uart.cc:
dev/uart.hh:
dev/uart8250.cc:
dev/uart8250.hh:
sim/process.cc:
sim/system.cc:
fixes for newmem
dev/io_device.hh:
a system pointer is probably useful for every device to have
mem/bus.hh:
mem/physical.cc:
new address ranges function
python/m5/objects/SimpleDisk.py:
simple disk now has a system pointer rather than physmem directly
--HG--
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--HG--
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in the InstObjParams constructor.
arch/isa_parser.py:
Expanded the capability of the InstObjParams constructor to allow adding in extra keys for use in templates. These are added as key, value tuples as optional arguements.
arch/sparc/isa/base.isa:
arch/sparc/isa/formats/mem.isa:
arch/sparc/isa/formats/priv.isa:
The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor.
arch/sparc/isa/decoder.isa:
Fixed up alot of instructions, and fixed indentation.
arch/sparc/isa/formats/integerop.isa:
The genCompositeIop function is no longer needed, as this functionality is now in the InstObjParams constructor. Also changed the immediate values to be signed.
base/traceflags.py:
Added SPARC traceflag
configs/test/hello_sparc:
Recompiled without -mflat
cpu/cpu_exec_context.cc:
Used the regfile clear function rather than memsetting to 0.
--HG--
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arch/alpha/isa_traits.hh:
arch/mips/isa_traits.cc:
Turned the integer register file into a class instead of a typedef to an array.
arch/alpha/regfile.hh:
Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs.
arch/mips/isa_traits.hh:
Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition.
arch/sparc/isa_traits.hh:
Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger.
arch/sparc/regfile.hh:
Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile.
cpu/cpu_exec_context.hh:
Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0.
cpu/exec_context.hh:
Added the changeRegFileContext function.
cpu/exetrace.cc:
Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array.
cpu/exetrace.hh:
Get the address of the regs object, now that it isn't an array.
--HG--
extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
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SConscript:
comment out most devices
add vport.cc
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
push in alpha name space
fix for new memory system
arch/alpha/faults.cc:
arch/alpha/faults.hh:
Added an unimplemented fault that can be returned if a certain
function isn't implemented
arch/alpha/freebsd/system.cc:
arch/alpha/linux/system.cc:
arch/alpha/stacktrace.cc:
arch/alpha/system.cc:
arch/alpha/tlb.hh:
arch/alpha/tru64/system.cc:
fixed for new memory system
arch/alpha/tlb.cc:
fixed for new memory system
removed code that seems to have no purpose
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
fixed for new memory system
put in namespace AlphaISA
base/remote_gdb.cc:
fix for new memory system
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
create two ports one of physical accesses and one for superpage accesses
Add functions getVirtPort() getPhysPort() delVirtPort(). To get statically
allocated physical or virtual ports or if an execcontext is passed in
get a dynamically allocated virtual port
dev/alpha_console.cc:
dev/alpha_console.hh:
Redo for new memory system
dev/io_device.cc:
dev/io_device.hh:
new I/O devices for new memory system
kern/linux/events.cc:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/tru64/dump_mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
Arguments now in namespaces
kern/tru64/tru64_events.cc:
mem/bus.cc:
fix for new memory syste
mem/physical.hh:
new addressranges function
getPort should be public
mem/port.hh:
Add write/read methods to functional port
update getDeviceAddrRanges to have a list of both snoops and response lists
sim/pseudo_inst.cc:
sim/system.cc:
sim/system.hh:
Update for new mem system
sim/vptr.hh:
comment out code and replace with panics
This will need to be fixed at some point, but it's not easy.
--HG--
extra : convert_revision : 41f41f422cfbab3751284d55cccb6ea64a7956e2
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