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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
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Commit message (
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Author
2006-11-10
Try to setup commands properly.
Kevin Lim
2006-11-10
Change up some warnings to DPRINTFs.
Kevin Lim
2006-10-31
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-10-31
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-31
remove connectAll() and connect() code since it isn't used anymore. (The pyth...
Ali Saidi
2006-10-31
add the ability to insert into the middle of the timing port send list
Ali Saidi
2006-10-30
Delete obsolete directories: src/oldmem, src/mem/timing, src/mem/NOTES.
Steve Reinhardt
2006-10-30
FSConfig.py:
Lisa Hsu
2006-10-30
se.py, fs.py:
Lisa Hsu
2006-10-30
ensure that there is a "/" between the cptdir and the cpt.%d.
Lisa Hsu
2006-10-30
Merge zizzer:/bk/newmem
Lisa Hsu
2006-10-30
decouple the switch option from the warmup period option - parsing was confus...
Lisa Hsu
2006-10-30
Use some python os.path stuff to make it more flexible where we can execute t...
Kevin Lim
2006-10-30
Merge zizzer:/bk/newmem
Lisa Hsu
2006-10-30
add some comments and make the warmup period in a switchover parameterizable.
Lisa Hsu
2006-10-29
An attempt to serialize the state of the micro code mechanism in the simple cpu.
Gabe Black
2006-10-29
Move the mem classes into util.isa so that multiple inheritance can be used i...
Gabe Black
2006-10-29
Fix when the IsDelayedCommit flag is set.
Gabe Black
2006-10-29
Bring casa and casxa up to date
Gabe Black
2006-10-29
Fixed ldstub to use the right format, and made the load/store operations use ...
Gabe Black
2006-10-29
Add an integer microcode register.
Gabe Black
2006-10-28
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-28
remove intel nic from SConscript
Ali Saidi
2006-10-28
This one really needs to be arch/faults.hh
Gabe Black
2006-10-28
Include the right version of faults.hh
Gabe Black
2006-10-28
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2006-10-28
One last adjustment to get rid of skew in the simple atomic cpu.
Gabe Black
2006-10-27
Merge zizzer:/bk/newmem
Lisa Hsu
2006-10-27
factor out common run code from se.py and fs.py.
Lisa Hsu
2006-10-27
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-27
add packet_access.hh
Ali Saidi
2006-10-27
A more complete attempt to fix the clock skew.
Gabe Black
2006-10-27
Potential fix to clock skew problem.
Gabe Black
2006-10-27
Merge zizzer.eecs.umich.edu:/bk/newmem
Gabe Black
2006-10-27
Update stats for fill/spill handlers
Gabe Black
2006-10-27
Got rid of some outdated comments.
Gabe Black
2006-10-27
Made the regfile compatible with the new definitions in MiscRegFile
Gabe Black
2006-10-27
Clean up MiscRegFile
Gabe Black
2006-10-26
Reorganized the MiscRegFile
Gabe Black
2006-10-26
Cleaned up the decoder slightly.
Gabe Black
2006-10-26
Added a few functions to stuff values into bitfields in an instruction.
Gabe Black
2006-10-26
Changed the number of register windows to be more realistic.
Gabe Black
2006-10-26
Got rid of some debug output
Gabe Black
2006-10-26
Change the default function from setMiscRegWithEffect to setMiscReg
Gabe Black
2006-10-26
Merge zizzer:/bk/newmem
Lisa Hsu
2006-10-26
se.py:
Lisa Hsu
2006-10-26
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-26
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-10-26
Remove old py file.
Kevin Lim
2006-10-25
Fix simple timing port keep a list of all packets, have only one event, and s...
Ali Saidi
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