index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
2013-01-07
tests: Create base classes to encapsulate common test configurations
Andreas Sandberg
2013-01-07
cache: add note about where conflicts are handled
Ali Saidi
2013-01-04
regressions: stats update due to decoder changes
Nilay Vaish
2013-01-04
Decoder: Remove the thread context get/set from the decoder.
Gabe Black
2013-01-04
X86: Move address based decode caching in front of the predecoder.
Gabe Black
2013-01-04
SPARC: Keep a copy of the current ASI in the decoder.
Gabe Black
2013-01-04
ARM: Keep a copy of the fpscr len and stride fields in the decoder.
Gabe Black
2012-12-30
x86 regressions: stats update due to new x87 instructions
Nilay Vaish
2012-12-30
x86: implement x87 fp instruction fnstsw
Nilay Vaish
2012-12-30
x86: implement x87 fp instruction fsincos
Nilay Vaish
2012-12-12
arm regressions: updates to config.ini, terminal files
Nilay Vaish
2012-12-12
arm: set uopSet_uop as conditional or unconditional control
Nathanael Premillieu
2012-12-12
arm: set movret_uop as conditional or unconditional control
Nathanael Premillieu
2012-12-11
regressions: stats update due to stats from ruby prefetcher
Nilay Vaish
2012-12-11
ruby: add support for prefetching to MESI protocol
Nilay Vaish
2012-12-11
ruby: modify the directed tester to read/write streams
Nilay Vaish
2012-12-11
ruby: change slicc to allow for constructor args
Nilay Vaish
2012-12-11
ruby: add a prefetcher
Nilay Vaish
2012-12-11
ruby: add functions for computing next stride/page address
Nilay Vaish
2012-12-06
regression test: update a couple of config.ini files
Nilay Vaish
2012-12-06
TournamentBP: Fix some bugs with table sizes and counters
Erik Tomusk
2012-12-06
inorder cpu: add missing DPRINTF argument
Malek Musleh
2012-12-06
o3 cpu: remove some unused buggy functions in the lsq
Nathanael Premillieu
2012-11-19
config: Fix description of checkpoint option from cycle to tick
Andreas Hansson
2012-11-16
sim: have a curTick per eventq
Nilay Vaish
2012-11-10
regressions: stats update due to ruby functional access patch
Nilay Vaish
2012-11-10
ruby: support functional accesses in garnet flexible network
Nilay Vaish
2012-11-10
ruby: bug in functionalRead, revert recent changes
Nilay Vaish
2012-11-08
mem: Fix DRAM draining to ensure write queue is empty
Andreas Hansson
2012-11-03
x86, util: add m5_writefile to m5op_x86.S
Lluis Vilanova
2012-11-02
ruby: reset and dump stats along with reset of the system
Hamid Reza Khaleghzadeh ext:(%2C%20Lluc%20Alvarez%20%3Clluc.alvarez%40bsc.es%3E%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2012-11-02
mem: fix use after free issue in memories until 4-phase work complete.
Ali Saidi
2012-11-02
update stats for preceeding changes
Ali Saidi
2012-11-02
mem: Add support for writing back and flushing caches
Andreas Sandberg
2012-11-02
sim: Add drain methods to request additional cleanup operations
Andreas Sandberg
2012-11-02
sim: Add SWIG interface for Serializable
Andreas Sandberg
2012-11-02
python: Rename doDrain()->drain() and make it do the right thing
Andreas Sandberg
2012-11-02
sim: Reuse the code to change memory mode.
Andreas Sandberg
2012-11-02
sim: Move the draining interface into a separate base class
Andreas Sandberg
2012-11-02
cpu: O3 add a header declaring the DerivO3CPU
Andreas Sandberg
2012-11-02
cpu: Add header files for checker CPUs
Andreas Sandberg
2012-11-02
dev: Fix ethernet device inheritance structure
Andreas Sandberg
2012-11-02
sim: Include object header files in SWIG interfaces
Andreas Sandberg
2012-11-02
pci: Make Python wrapper cast to the right type
Andreas Sandberg
2012-11-02
mips: Remove unused Python file
Andreas Sandberg
2012-11-02
dev: Add missing inline declarations
Andreas Sandberg
2012-11-02
base: Add missing header file to addr_range.hh.
Andreas Sandberg
2012-10-09
m5: Expose m5 pseudo-instructions to C/C++ via a static library
James Clarkson
2012-11-02
ARM: dump stats and process info on context switches
Dam Sunwoo
2012-11-02
base: Fix a few incorrectly handled print format cases
Chander Sudanthi
[next]