Age | Commit message (Collapse) | Author |
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extra : convert_revision : 7efb2680cef4219281b94d680a4a7c75c123f89d
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extra : convert_revision : 78cbd0c28d3fa1109eb2eacaf2a8009f13158a9b
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implementing faligndata more correctly.
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extra : convert_revision : 44e778ce8f8d8606b6a50f3f12f0b87e1bf0ed66
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extra : convert_revision : 698b0ce38c7a47306f97df2cc80cdae4a51b22c7
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into ewok.(none):/home/gblack/m5/newmem
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extra : convert_revision : 46e14792cfd18e4e27935b848c9953a7c44e9334
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Add checks for swig & libz, version check for swig.
Factor out version check code into function, use for mysql too.
SConstruct:
Add checks for swig & libz, version check for swig.
Factor out version check code into function, use for mysql too.
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extra : convert_revision : a077d961ae52011141fbf5021b167485f8638139
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into ewok.(none):/home/gblack/m5/newmem
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extra : convert_revision : 15d8fd51f0c70da4d2e52c11864f3ab0f3f62811
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extra : convert_revision : 8987d3ab62ea4b2fa18ebd40fc980b30561d7e45
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Added in the filename parameter which is provided for the user space linker.
Fix the ordering and alignment of stack elements.
Made mmap start with the address it has been seen starting with "in the wild"
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extra : convert_revision : 8734753145f59a6cb433e4f92f43cb28a44b56d4
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returning the size of a pointer to an IntReg
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extra : convert_revision : 02c04ffceb447b7683ba5ebd4752819d0014cc19
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1. alignaddr wrote it's address to a floating point register rather than a gpr.
2. sethi was sign extending it's immediate value.
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extra : convert_revision : 9aa30a6485bc4cba916367973b986d439b7c7588
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into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem
src/python/m5/objects/BaseCPU.py:
Merge duplicate change
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extra : convert_revision : 214e57999ee78aadfc86e1f0b7198ff0d981ce16
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src/mem/packet.hh:
Make sure packets set the time parameter correctly.
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extra : convert_revision : e381d2789e0aaa1b6c2fbde417b7ba5815deec61
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Add temporary cpu.mem parameter settings.
configs/example/fs.py:
Add temporary cpu.mem parameter settings.
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extra : convert_revision : d7c2fcd8df8dc809b0511485877b2a85769aaf43
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extra : convert_revision : 22cd31c58f18fd92bd61ee4b4a218926f7290045
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rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stderr
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini => tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out => tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stderr => tests/quick/00.hello/ref/alpha/tru64/simple-timing/stderr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout => tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout
rename : tests/test-progs/hello/bin/alpha/linux/hello => tests/test-progs/hello/bin/alpha/tru64/hello
extra : convert_revision : 583c30603e51304c9a19e3ae25fbf0623be0489d
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Arg to m5.simulate() is a delta, not an absolute curTick value.
I didn't test this change, but I'm not convinced the previous
example was tested either, so I don't feel too badly about it.
configs/example/fs.py:
Arg to m5.simulate() is a delta, not an absolute curTick value.
I didn't test this change, but I'm not convinced the previous
example was tested either, so I don't feel too badly about it.
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extra : convert_revision : ef7df7b83b3e2b5da02408c674169ccbed75a441
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Fix BATCH_CMD bug.
tests/SConscript:
Fix BATCH_CMD bug.
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extra : convert_revision : 696d51a67790506db749244edf4afab920a63d1b
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extra : convert_revision : 2ec600b8e72e40e8b96e3b1dbe0334aa05e0f30b
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extra : convert_revision : 0b64f2d95b439b19f1131fe00f45da56617b0026
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into zeep.pool:/z/saidi/tmp/m5.newmem
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extra : convert_revision : 49289cfe8d547045dd89133db71d16318bc8510b
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extra : convert_revision : 0a622ab0f0f7653d28d4ed3dd27113ae2bc82cae
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rename build/*/test dir to build/*/tests for consistency
SConstruct:
rename build/*/test dir to build/*/tests for consistency
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extra : convert_revision : 6af3cf6b2d6582b2c4d2bc9211e44767e0fa494f
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minor change
AUTHORS:
minor change
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extra : convert_revision : b638f14f0541ff5d48546c7fcd27d1bf0bdf615f
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into zed.eecs.umich.edu:/z/hsul/work/m5/newmem
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extra : convert_revision : 382a9d4b420a9bdb35f93049306b7b7af0d33ad5
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also, update all the rcS files so that they are in sync with the new linux-dist build system.
configs/boot/devtime.rcS:
configs/boot/iscsi-client.rcS:
configs/boot/iscsi-server.rcS:
configs/boot/micro_memlat.rcS:
configs/boot/micro_stream.rcS:
configs/boot/micro_tlblat.rcS:
configs/boot/nat-netperf-maerts-client.rcS:
configs/boot/nat-netperf-server.rcS:
configs/boot/nat-netperf-stream-client.rcS:
configs/boot/nat-spec-surge-client.rcS:
configs/boot/nat-spec-surge-server.rcS:
configs/boot/natbox-netperf.rcS:
configs/boot/natbox-spec-surge.rcS:
configs/boot/netperf-rr.rcS:
configs/boot/netperf-server.rcS:
configs/boot/netperf-stream-client.rcS:
configs/boot/netperf-stream-nt-client.rcS:
configs/boot/nfs-client-nhfsstone.rcS:
configs/boot/nfs-client-tcp-smallb.rcS:
configs/boot/nfs-client-tcp.rcS:
configs/boot/nfs-client.rcS:
configs/boot/nfs-server-nhfsstone.rcS:
configs/boot/nfs-server.rcS:
configs/boot/ping-client.rcS:
configs/boot/ping-server.rcS:
configs/boot/spec-surge-client.rcS:
configs/boot/spec-surge-server.rcS:
configs/boot/surge-client.rcS:
configs/boot/surge-server.rcS:
make tree rcS files reflect what we've been actually using in /dist.
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extra : convert_revision : 48fe4fe71938ef9d029e428028a271242c8d2faa
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extra : convert_revision : 7de51b1e42cff8c0f377a21cfcb6d1d13df1847a
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src/python/m5/objects/BaseCPU.py:
Make mem parameter a MemObject, not just a PhysicalMemory
Fix a reference not using self
tests/configs/simple-atomic.py:
Set the mem paramter
tests/configs/simple-timing.py:
Set the mem parameter
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extra : convert_revision : 6bd9df36831a1c5bafc9e88ab945c2ebe91db785
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into zeep.pool:/z/saidi/tmp/m5.newmem
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extra : convert_revision : b754945635cc0864fdd68ec4bee736aab9bca407
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extra : convert_revision : 09adadca1ead8d32589cf7a243fddd24fcc51f4b
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extra : convert_revision : acb123227c7efbb46cc25e0ca69f7b2e2ec5b9c1
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extra : convert_revision : 6b62398778208bc4e64582e06fb73b71a94f3014
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into zeep.pool:/z/saidi/tmp/m5.newmem
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extra : convert_revision : f4fa62290ca2bbd4726fb6c8e89655dade53bb68
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Kinda port DRAM to new memory system. The code is *really* ugly (not my fault) and right now something about the stats it uses
causes a simulator segfault.
src/SConscript:
Add dram.cc to sconscript
src/mem/physical.cc:
src/mem/physical.hh:
Add params struct to physical memory, use params, make latency function be virtual
src/python/m5/objects/PhysicalMemory.py:
Add DRAMMemory python class
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extra : convert_revision : 5bd9f2e071c62da89e8efa46fa016f342c01535d
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into zizzer.eecs.umich.edu:/z/stever/bk/newmem-head
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extra : convert_revision : 3bf1742201e61d61a906d057b52dc158aa7be2d0
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Get rid of caches in simple-timing config for now.
tests/SConscript:
another line for diff to ignore
tests/configs/simple-timing.py:
turn off caches for now
tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout:
update for inst/tick rate (old one was debug?)
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout:
works now (no caches)
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extra : convert_revision : 472030f63297346976db6274a78235c93d4eef8e
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the python handles it, and the simulation continues. Also, make it so that the cycle number is part of the cpt dir name, so that multiple checkpoints do not overwrite each other.
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extra : convert_revision : a55e4ac20da5a57ea8735951b9070960b9b8298f
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src/python/m5/objects/BaseCPU.py:
bug fix
tests/SConscript:
fix up diff ignore strings to reflect changes
in m5 output
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extra : convert_revision : b8e4acee34599ddd431b69fc9d40b6f6e440d128
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fix 'reorganization' typo and added o3cpu multiple isa support to list
AUTHORS:
fix 'reorganization' typo and added o3cpu multiple isa support to list
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extra : convert_revision : cd5d0ba69b37add0f10135e5772a57a7aacdf06e
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