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AgeCommit message (Expand)Author
2007-01-27While I'm waiting for legion to run make m5 compile with a few more compilersAli Saidi
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26forgot to include this fileAli Saidi
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26Make Sparc traceflag even more chattyAli Saidi
2007-01-26Merge zizzer:/bk/newmemAli Saidi
2007-01-26Merge zeep.pool:/z/saidi/work/m5.newmemAli Saidi
2007-01-26make our code a little more standards compliantAli Saidi
2007-01-26Merge zizzer:/bk/newmemLisa Hsu
2007-01-26eliminate cpu checkInterrupts bool, it is redundant and unnecessary.Lisa Hsu
2007-01-25Move time forward to Jan 1, 2009 and update statsNathan Binkert
2007-01-25Merge zizzer.eecs.umich.edu:/bk/newmemNathan Binkert
2007-01-25Instead of passing an int to represent time between python and C++Nathan Binkert
2007-01-25fix smul and sdiv to sign extend, and handle overflow/underflow corretlyAli Saidi
2007-01-23use pstate.am to mask off PC/NPC where it needs to +beAli Saidi
2007-01-22fix compiling on x86/SolarisAli Saidi
2007-01-22clean up fault code a little bitAli Saidi
2007-01-22we decided to check for .interp instead of .dynamicAli Saidi
2007-01-22Merge zizzer:/bk/newmemAli Saidi
2007-01-22check if an executable is dynamic and die if it isAli Saidi
2007-01-22use writeTagAccess() function to unify writing of Tag access registersAli Saidi
2007-01-21make sure that page bits of VA on tlb insert are 0Ali Saidi
2007-01-21add dumb time of day deviceAli Saidi
2007-01-20fix InterruptLevel code to return the correct levelAli Saidi
2007-01-20atually set all 64 bits of the retun value to 0Ali Saidi
2007-01-20fix flushw implementationAli Saidi
2007-01-20Rearange tlb code to remove some duplicateAli Saidi
2007-01-20Spill and Fill handlers are actually n*4 + the start addressAli Saidi
2007-01-19Merge zed.eecs.umich.edu:/.automount/zeep/z/saidi/work/m5.newmemLisa Hsu
2007-01-19some hstick and hintp changes.Lisa Hsu
2007-01-17Allow ASI_LDTX_REALAli Saidi
2007-01-17do a linear search for matching tlb entries instead of using map because you ...Ali Saidi
2007-01-17Implement reading writing of sync fault status register and address registerAli Saidi
2007-01-16In the case that we generate a fault (e.g. a tlb miss) on a microcoded instru...Ali Saidi
2007-01-16Don't add symbols for loaded files to symbol table since they are pretty much...Ali Saidi
2007-01-16Fix legion lock code a bit so that if we jump out of a micro coded instructio...Ali Saidi
2007-01-16In the case of ASI_P or ASI_LDTX_P set primary and skip the other checksAli Saidi
2007-01-16Modify ISA and staticInst to support a IsFirstMicroOp flagAli Saidi
2007-01-11Merge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5Lisa Hsu
2007-01-11ua2005.cc:Lisa Hsu
2007-01-11ua2005.cc:Lisa Hsu
2007-01-11Add Trap Level Zero to interrupts, remove some unreachable code that I forgot...Lisa Hsu
2007-01-10bug fixes to get us to 145m instructionsAli Saidi
2007-01-09quiet/remove some warningsAli Saidi
2007-01-09add memory mapped disk deviceAli Saidi
2007-01-08pagetable.hh:Lisa Hsu
2007-01-08the way i understand it, interrupts in m5 is a little bloated. the usage of ...Lisa Hsu
2007-01-08some formatting changes, and update how I do bitfields for HPSTATE and PSTATE...Lisa Hsu
2007-01-08change when legion-lock causes the simulation to die. It now happens after tw...Ali Saidi
2007-01-08fix softint and partially implement hstick interrupts need to figure out how ...Ali Saidi
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