Age | Commit message (Collapse) | Author |
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 0822fbcc377781b53d2de9ba40ab9d985ccbc039
|
|
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : fa1e361fcae10fe7a91118007faeeabe3fecba2a
|
|
right now since we don't have cache support for
the atomic instructions.
--HG--
extra : convert_revision : b7013e6963885dfe2b4630ac175e24ddad6d42a6
|
|
--HG--
extra : convert_revision : d068dfec69b28d48fc299a4108e165decfaaace7
|
|
directly configured by python. Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.
--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
|
|
src/arch/x86/SConscript:
Add in process source files.
src/arch/x86/isa_traits.hh:
Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
An X86 process class.
src/base/loader/elf_object.cc:
Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
Add an x86 traceflag
src/sim/process.cc:
Add in code to create an x86 process.
src/arch/x86/intregs.hh:
A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
An x86 hello world test binary.
--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
|
|
Fix things so the stats dump happens last.
--HG--
extra : convert_revision : ea842dbcbb77dd1c715c4e5b57d2470e558c4265
|
|
into zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace
--HG--
extra : convert_revision : 0959fb162253ff1eed8da0a990f58897322f0e1f
|
|
it's single stepping code.
--HG--
extra : convert_revision : 69b1668a850519ab98b02c525ec41ff727eb6036
|
|
--HG--
extra : convert_revision : 2c10a80a2f73207539e3f98b4a3b864d431f5035
|
|
arguments.
--HG--
extra : convert_revision : fcec1ad134b53a419a952e556ed75cb1559a1127
|
|
--HG--
extra : convert_revision : 643c147b77e931d49ac559681d4bbda737f6e1c7
|
|
--HG--
extra : convert_revision : 94f3f19eb91b7f54918640b7605008eb1fe75fc7
|
|
--HG--
extra : convert_revision : a39a158fec4560f6eb7a6987592c473677c0b1ba
|
|
--HG--
extra : convert_revision : 3bdbc415a73c6bb4d723f68714a96c9f922ba5e6
|
|
--HG--
extra : convert_revision : bb799dcea58b51d6e1d3d744581ea48c5c1490fe
|
|
--HG--
extra : convert_revision : bc8c5e78aac0e9033d6cbc756d8092369ac29072
|
|
--HG--
extra : convert_revision : 9d00209e5c0ae8aa5ac37f9558627ee212a72c9b
|
|
--HG--
extra : convert_revision : 5570a595b9adbe9c35f9b4f8dd3b50533b5beb97
|
|
--HG--
extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
|
|
--HG--
extra : convert_revision : dd6b4d14070a2e99c179c5f780c9935847da8eda
|
|
The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures.
--HG--
extra : convert_revision : cafe25befd64f83a424c1a09f5e62a16df5408ad
|
|
--HG--
extra : convert_revision : 2317e9bb0bcf8010ab5d02019f7a14eeb7b1459c
|
|
--HG--
extra : convert_revision : c0170eae8aeae130f81618ae49a60f879c2b523f
|
|
--HG--
extra : convert_revision : 712480fef36bf7a34c2c0b8d19dd82689eb78a1d
|
|
--HG--
extra : convert_revision : f0a2cdf7d669834b90444fc390b0aceede474737
|
|
what this is for, and it probably doesn't work on anything but Alpha.
--HG--
extra : convert_revision : 9bc3833628d31799a7b578c450dac096a19aead3
|
|
--HG--
extra : convert_revision : 6289181697142f672548a4d4cf6e010171cb98e1
|
|
--HG--
extra : convert_revision : 1e8ef87ddb28873045a08bd104afc8ce129c4299
|
|
--HG--
extra : convert_revision : 9d572651fc1722b15ae7dbc59c108d680c911f04
|
|
--HG--
extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed
|
|
--HG--
extra : convert_revision : 15a1b49ff9e0a1a15bd2500bec9ec9bc95ee5898
|
|
--HG--
extra : convert_revision : 62583e5a5647913fb36e1aae265e8ac52a165829
|
|
Alpha does.
--HG--
extra : convert_revision : b75dbdd95ceb4ec71275588a5cf8e6b614cf4539
|
|
--HG--
extra : convert_revision : c00a077dd7ae8f6b48c6939034be244bcf48d715
|
|
--HG--
extra : convert_revision : bcf448aedd832022527cc972f7a1f0433987c564
|
|
--HG--
extra : convert_revision : abfcf4005ec636b1e6c085515b63c1d8e69e3370
|
|
object?
--HG--
extra : convert_revision : 51757435bb0b20132f3ec5782db31382bb2cca18
|
|
from some other include.
--HG--
extra : convert_revision : adbd4899508e3d30959a504a48402f01d1187099
|
|
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : b585cea2221377eb2fceea8976c46a17c0034f51
|
|
--HG--
extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
|
|
src/dev/sparc/iob.cc:
don't warn on cpu restart/idle/halt stuff
tests/SConscript:
add sparc target in test Sconscript
util/regress:
Add SPARC_FS target in regress
--HG--
extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
|
|
into zeep.pool:/z/saidi/work/m5.newmem
--HG--
extra : convert_revision : fd6464c9883783c7c2cbefba317f4a0f20dd24cb
|
|
configs/common/FSConfig.py:
add an attachOnChipIO to force people to think about where "onchip" i/o should be connected in their hierarchy
--HG--
extra : convert_revision : cf79a9a00760b7daf28063f407a04bd38b956843
|
|
configs/common/FSConfig.py:
Use binaries we've compiled instead of the ones that come with Legion
src/arch/alpha/interrupts.hh:
get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number
src/arch/sparc/asi.cc:
Add AsiIsInterrupt() to AsiIsMmu()
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
Add InterruptVector type
src/arch/sparc/interrupts.hh:
rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared
src/arch/sparc/isa_traits.hh:
Add the "interrupt" trap types to isa traits
src/arch/sparc/miscregfile.cc:
add names for all the misc registers and possible post an interrupt when TL is changed.
src/arch/sparc/miscregfile.hh:
Add a helper function to post an interrupt when pil < some set softint
src/arch/sparc/regfile.cc:
src/arch/sparc/regfile.hh:
InterruptLevel shouldn't really live here, moved to interrupt.hh
src/arch/sparc/tlb.cc:
Add interrupt ASIs to TLB
src/arch/sparc/ua2005.cc:
Add checkSoftInt to check if a softint needs to be posted
Check that a tickCompare isn't scheduled before scheduling one
Post and clear interrupts on queue writes and what not
src/base/bitfield.hh:
Add an helper function to return the msb that is set
src/cpu/base.cc:
src/cpu/base.hh:
get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending
src/cpu/intr_control.cc:
src/cpu/intr_control.hh:
src/dev/alpha/tsunami_cchip.cc:
src/python/m5/objects/IntrControl.py:
Make IntrControl have a system pointer rather than using a cpu pointer to get one
src/dev/sparc/SConscript:
add iob to SConsscrip
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini:
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini:
tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out:
update config.ini/out for intrcntrl not having a cpu pointer anymore
--HG--
extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
|
|
--HG--
extra : convert_revision : 9b5ad2704dfd63a1aa8ad0e4275fd0e3a7d32d6d
|
|
nonsensical for x86.
--HG--
extra : convert_revision : 2f7845db6d65b353985b474f7012cfbbaece6a39
|
|
non-sensical in x86.
--HG--
extra : convert_revision : bba78db3667e214c95bb127872d3fdf546619703
|
|
--HG--
extra : convert_revision : 438eb74f14e6ea60bab5012110f3946c9213786e
|
|
into iceaxe.int.chaotic.net:/Users/nate/work/m5/outgoing
--HG--
extra : convert_revision : b3d48721ead389fa807c0d5392039d4fc71a252e
|