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AgeCommit message (Expand)Author
2007-04-04Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...Kevin Lim
2007-04-04Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-04-03Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemAli Saidi
2007-04-03fixed sttw instruction changes execution trace a bitAli Saidi
2007-04-03Fix a memory leak. Hopefully this fixes the longer running benchmarks.Kevin Lim
2007-04-03Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-03A batch of changes and fixes. Macroops are now generated automatically, multi...Gabe Black
2007-04-03Zero out ModRM if the byte isn't there, and fix some displacement size stuff.Gabe Black
2007-04-02Remove/comment out DPRINTFs that were causing a segfault.Kevin Lim
2007-04-02Fix up SPARC's CPU builder to match changes to Alpha's CPU builder.Kevin Lim
2007-03-30Update refs for recent changes.Kevin Lim
2007-03-29Merge zizzer:/bk/newmemAli Saidi
2007-03-29make serialization at least seem to workAli Saidi
2007-03-29Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-29Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-03-29Added SPARC_SE simple timing twolf regression.Gabe Black
2007-03-29Added a SPARC_SE simple timing mcf regression.Gabe Black
2007-03-29get rid of CWP bounds warning...Ali Saidi
2007-03-29add to instruction test sttw instructionAli Saidi
2007-03-29Made the MultiOp format do a little more. It now sets up single microop instr...Gabe Black
2007-03-29Add a microcode assembler. A microcode "program" is a series of statements. E...Gabe Black
2007-03-29Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-03-29Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-03-29Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmemGabe Black
2007-03-29Added SPARC_SE simple timing vortex regression.Gabe Black
2007-03-29Added SPARC_SE simple timing gzip regression.Gabe Black
2007-03-29Override addPrivateSplitL1Caches function in order to automatically set the t...Kevin Lim
2007-03-29Update code so that the O3 CPU can handle not initially having anything hooke...Kevin Lim
2007-03-29Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-29Fidget with the syntax of the MultiOp format in anticipation of making it act...Gabe Black
2007-03-29Add code to generate register and immediate based integer op microop classes.Gabe Black
2007-03-29Allow "let" blocks to add code to the output files.Gabe Black
2007-03-28Call compare and Swap on the target, not the response.Ron Dreslinski
2007-03-27some more fixes... non-tso stuff seems to workAli Saidi
2007-03-27Merge zizzer:/bk/newmemRon Dreslinski
2007-03-27First Pass At Cmp/Swap in cachesRon Dreslinski
2007-03-26Instead of creating a new python process to run traceflags.py,Nathan Binkert
2007-03-26Merge zizzer:/bk/newmemAli Saidi
2007-03-26first bit of life from the intel gigabit modelAli Saidi
2007-03-25Update stats for changes.Kevin Lim
2007-03-24Update for new trace data behavior.Kevin Lim
2007-03-24Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-24Added a SPARC_SE simple atomic regression for the mcf benchmark.Gabe Black
2007-03-23Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-03-23Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-23Make hardware loads/stores serializing; they need to avoid certain out-of-ord...Kevin Lim
2007-03-23Updates for commit.Kevin Lim
2007-03-233 memory system fixes:Kevin Lim
2007-03-23Handle status bits a little better, as well as non-speculative instructions.Kevin Lim
2007-03-23Two fixes:Kevin Lim
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