index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
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log msg
author
committer
range
Age
Commit message (
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Author
2007-07-20
Appended _NEAR to the near version of call and return.
Gabe Black
2007-07-20
Make load and store ops use the appropriate sized data access.
Gabe Black
2007-07-20
Implement the increment and decrement instructions, and the two operand form ...
Gabe Black
2007-07-20
Fix code that computes displacement size.
Gabe Black
2007-07-20
Add a bitfield to decode based on what prefixes are used.
Gabe Black
2007-07-20
Add a parameter type to read a register index from the opcode itself.
Gabe Black
2007-07-20
Fix function which calculates the carry flag.
Gabe Black
2007-07-20
Fix carry flag for subtracts, and clean up code slightly.
Gabe Black
2007-07-20
Fixed width parameter and provided a parameter to flip the carry bit on subtr...
Gabe Black
2007-07-19
x86 fixes
Gabe Black
2007-07-18
Check for the two opcode prefix correctly and add in some instructions.
Gabe Black
2007-07-18
Hook near returns into the decoder.
Gabe Black
2007-07-18
Implement near returns.
Gabe Black
2007-07-18
Make instructions that conditionally set registers set them to their old valu...
Gabe Black
2007-07-18
Fix the overload which prints ExtMachInst in X86.
Gabe Black
2007-07-18
Make store microops actually store instead of load.
Gabe Black
2007-07-18
Fix a comment to refer to the right type of instruction.
Gabe Black
2007-07-18
Fix the panic in the "error" format for x86,
Gabe Black
2007-07-18
Implement some forms of add.
Gabe Black
2007-07-18
Fix the operand types in a section of the decoder.
Gabe Black
2007-07-18
Make the data size used by regops overridable in the microassembly.
Gabe Black
2007-07-18
Fill out the miscreg file and add types to miscregs.hh
Gabe Black
2007-07-18
Hook x86 nop into the decoder.
Gabe Black
2007-07-18
Fix a compilation error for SubBitUnions,
Gabe Black
2007-07-18
Implement the x86 nop to be a "fault" microop which returns "NoFault".
Gabe Black
2007-07-18
Add a generateDisassembly function to the MicroFault StaticInst.
Gabe Black
2007-07-18
Make name, isMachineCheckFault, and isAlignmentFault const.
Gabe Black
2007-07-17
Calculate the correct address size.
Gabe Black
2007-07-17
Make disassembled x86 register indices reflect their size.
Gabe Black
2007-07-17
Implemented jnz.
Gabe Black
2007-07-17
Use limm to set up immediate value for subtract instruction.
Gabe Black
2007-07-17
Implement the jz instruction.
Gabe Black
2007-07-17
Make "test" set some condition codes.
Gabe Black
2007-07-17
Add in support for condition code flags.
Gabe Black
2007-07-17
Add in operand which holds the condition code bits of the flag register.
Gabe Black
2007-07-17
Add symbols for each of the flags a microop could set and each condition it c...
Gabe Black
2007-07-17
Actually include miscregs.hh
Gabe Black
2007-07-17
Create a file to describe misc registers.
Gabe Black
2007-07-17
Create a file of functions for computing condition codes.
Gabe Black
2007-07-17
Add a spot for the condition code portion of the flag register.
Gabe Black
2007-07-17
Add a conversion constructor so a bitunion can be initialized to a value.
Gabe Black
2007-07-14
Handle broken swig version that prints version info on stderr.
Steve Reinhardt
2007-07-14
Move bitunion code into it's own file.
Gabe Black
2007-07-14
Pull some hard coded base classes out of the isa description.
Gabe Black
2007-07-14
Disable PrintThreadInfo since it causes a panic when using VPtr.
Steve Reinhardt
2007-07-14
Make NO_FAST_ALLOC compile.
Steve Reinhardt
2007-07-14
Fix & tweak DPRINTFs for tracediff w/new cache code.
Steve Reinhardt
2007-07-13
ignore stuff that we don't want to see in the status
Nathan Binkert
2007-07-13
transfer tags
Nathan Binkert
2007-06-29
fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions...
Korey Sewell
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