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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
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Age
Commit message (
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Author
2010-06-02
ARM: Add a base class for SRS.
Gabe Black
2010-06-02
ARM: Implement a badMode function that says whether a mode is legal.
Gabe Black
2010-06-02
ARM: Allow flattening into any mode.
Gabe Black
2010-06-02
ARM: Decode TBB and TBH.
Gabe Black
2010-06-02
ARM: Decode the setend instruction.
Gabe Black
2010-06-02
ARM: Define the setend instruction.
Gabe Black
2010-06-02
ARM: Make a base class for instructions that use only an immediate.
Gabe Black
2010-06-02
ARM: Decode the arm version of ldrexd.
Gabe Black
2010-06-02
ARM: Decode the strex instructions.
Gabe Black
2010-06-02
ARM: Implement the strex instructions.
Gabe Black
2010-06-02
ARM: Set CPSR.E to SCTLR.EE on faults.
Gabe Black
2010-06-02
ARM: Warn about not implementing MPU translation, not panic about MMU.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.
Gabe Black
2010-06-02
ARM: Allow access to the RGNR register.
Gabe Black
2010-06-02
ARM: Make the MPUIR register report that 1 unified data region is supported.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers.
Gabe Black
2010-06-02
ARM: Respect the E bit of the CPSR when doing loads and stores.
Gabe Black
2010-06-02
ARM: Zero the micropc when vectoring to a fault.
Gabe Black
2010-06-02
ARM: Implement the V7 version of alignment checking.
Gabe Black
2010-06-02
ARM: Decode the RFE instruction.
Gabe Black
2010-06-02
ARM: Implement the RFE instruction.
Gabe Black
2010-06-02
ARM: Add a base class for the RFE instruction.
Gabe Black
2010-06-02
ARM: Make sure some undefined thumb32 instructions fault.
Gabe Black
2010-06-02
ARM: Squash the low order bits of the PC when performing a regular branch.
Gabe Black
2010-06-02
ARM: When changing the CPSR and branching, make sure the branch is second.
Gabe Black
2010-06-02
ARM: Ignore/warn when CSSELR or CCSIDR are accessed.
Gabe Black
2010-06-02
ARM: Ignore/warn access to the bpimva registers.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to the dccmvac register.
Gabe Black
2010-06-02
ARM: Decode the enterx and leavex instructions.
Gabe Black
2010-06-02
ARM: Implement the enterx and leavex instructions.
Gabe Black
2010-06-02
ARM: Fix the implementation of BX to work in thumbEE mode.
Gabe Black
2010-06-02
ARM: When an instruction is intentionally undefined, fault on it.
Gabe Black
2010-06-02
ARM: Decode the thumb version of the ldrd and strd instructions.
Gabe Black
2010-06-02
ARM: Explicitly keep track of the second destination for double loads/stores.
Gabe Black
2010-06-02
ARM: Decode the thumb32 load byte/memory hint instructions.
Gabe Black
2010-06-02
ARM: Decode the load halfword, memory hints instructions for 32 bit Thumb.
Gabe Black
2010-06-02
ARM: Ignore/warn on accesses to icimvau.
Gabe Black
2010-06-02
ARM: Ignore/warn on iciallu.
Gabe Black
2010-06-02
ARM: Ignore/warn on ICIALLUIS.
Gabe Black
2010-06-02
ARM: Add support for the clidr register.
Gabe Black
2010-06-02
ARM: Decode the unimplemented data barrier CP15 accesses.
Gabe Black
2010-06-02
ARM: Implement a stub of CPACR.
Gabe Black
2010-06-02
ARM: Actually write the value of sctlr in ISA.clear().
Gabe Black
2010-06-02
ARM: Replace the ARM decode of CP15 MCR and MRC instructions.
Gabe Black
2010-06-02
ARM: Decode the unimplemented cp15 instruction barrier.
Gabe Black
2010-06-02
ARM: Ignore accesses to DCCIMVAC.
Gabe Black
2010-06-02
ARM: Allow accesses to the software thread id registers.
Gabe Black
2010-06-02
ARM: Allow accesses to the contextidr register.
Gabe Black
2010-06-02
ARM: Warn about and ignore accesses to DCCISW.
Gabe Black
2010-06-02
ARM: Decode the thumb versions of the mcr and mrc instructions.
Gabe Black
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