summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2006-10-12Fix CSHR retrysRon Dreslinski
--HG-- extra : convert_revision : caa7664f6c945396fa38ce62fbda018ebed4eaa6
2006-10-12Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : 0e184a0784100112db5841c587bd3dd638f8bdc0
2006-10-12small bus updates for functional accessesAli Saidi
--HG-- extra : convert_revision : c7a6b199c74ed4b4ffab14bbffb51e72d75b7742
2006-10-12Merge zizzer:/bk/newmemKorey Sewell
into zooks.eecs.umich.edu:/y/ksewell/research/m5-sim/cleanrepo --HG-- extra : convert_revision : 86abc4dabb7c72edc90fae951314d6a6b5c73705
2006-10-12Add test binary & inputsKorey Sewell
--HG-- extra : convert_revision : efc0249ae6f51b9f4f49741aafb2cad21e1fb11e
2006-10-12Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : fa5b2cfa79d87a0612b8116d407a8b2959d9095a
2006-10-12Remove bus and top level parameters from cacheRon Dreslinski
src/mem/cache/base_cache.hh: Remove top level param from cache src/mem/cache/coherence/uni_coherence.cc: Remove top level parameters from the cache --HG-- extra : convert_revision : 4437aeedc20866869de7f9ab123dfa7baeebedf0
2006-10-12Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem.head src/mem/packet.hh: hand merge --HG-- extra : convert_revision : 3f77707360235dc98c6b12a0367ca64a401313df
2006-10-12add a traceflag for functional accessesAli Saidi
implement fix packet and add the ability to print a packet to a ostream remove tabs in packet.hh (Could people stop inserting them??!?!?!) mark const functions in packet.hh as such src/base/traceflags.py: add a traceflag for functional accesses src/mem/packet.cc: implement fix packet and add the ability to print a packet to a ostream src/mem/packet.hh: add the ability to print a packet to an ostream remove tabs in file mark const functions as such --HG-- extra : convert_revision : 4297bce5e1d3abbab48be5bd9eb9e982b751fc7c
2006-10-12Check the response queue on functional accesses.Ron Dreslinski
The response queue is not tying up an MSHR, should we change that or assume infinite storage for responses? src/mem/cache/base_cache.cc: src/mem/tport.cc: Add in functional check of retry queued packets. --HG-- extra : convert_revision : 0cb40b3a96d37a5e9eec95312d660ec6a9ce526a
2006-10-12Another memleak in the memtester (need [] with the delete)Ron Dreslinski
src/cpu/memtest/memtest.cc: Another memleak in the memtester --HG-- extra : convert_revision : f7ab079e90d578fb6b9d1ff238d049fcce55b01b
2006-10-12Fix a memory leak in the memtesterRon Dreslinski
--HG-- extra : convert_revision : 93062b0f1a3ba7a5210e2f27099f20ae8f66522b
2006-10-12Fix problems with unCacheable addresses in timing-coherenceRon Dreslinski
src/base/traceflags.py: src/mem/physical.cc: Add debug falgs fro physical memory accesses src/mem/cache/cache_impl.hh: Snoops to uncacheable blocks should not happen src/mem/cache/miss/miss_queue.cc: Set the size properly on unCacheable accesses --HG-- extra : convert_revision : fc78192863afb11fc7c591fba169021b9e127d16
2006-10-11Merge zizzer:/bk/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : b6224624ea493531e5ecc161bede7433f96d8a0f
2006-10-11Make default ID unique (not broadcast)Ron Dreslinski
Fix a segfault associated with DefaultId src/mem/bus.cc: Handle a segfault in the bus when DefaultPort was being used src/mem/bus.hh: Make the Default ID more unique (it overlapped with Broadcast ID) --HG-- extra : convert_revision : 9182805c5cf4d9fe004e6c5be8547a8f41ed7bfe
2006-10-11Forgot to mark myself as on the retry listRon Dreslinski
--HG-- extra : convert_revision : c20170320a284a7bf143a929e4d3aa1475a8bfe0
2006-10-11add spec2k testsKorey Sewell
--HG-- extra : convert_revision : 619d6af7013b597ade6440f8cf84d6d099e31763
2006-10-11Fix bus in FS mode.Ron Dreslinski
src/mem/bus.cc: Add debugging statement src/mem/bus.hh: Fix implementation of bus for subsequent recvTimings while handling a retry request. src/mem/tport.cc: Rework timing port to retry properly --HG-- extra : convert_revision : fbfb5e8b4a625e49c6cd764da1df46a4f336b1b2
2006-10-11add bzip test-progKorey Sewell
--HG-- extra : convert_revision : f5197172b094d59ced84423eb34c31ddf23689ee
2006-10-11More cache fixes. Atomic coherence now works as well.Ron Dreslinski
src/cpu/memtest/memtest.cc: src/cpu/memtest/memtest.hh: Make Memtester able to test atomic as well src/mem/bus.cc: src/mem/bus.hh: Handle atomic snoops properly for cache->cache transfers src/mem/cache/cache_impl.hh: Debug output. Clean up memleak in atomic mode. Set hitLatency. Still need to send back reasonable number for atomic return value. src/mem/packet.cc: Add command strings for new commands src/python/m5/objects/MemTest.py: Add param to test atomic memory. --HG-- extra : convert_revision : 43f880e29215776167c16ea90793ebf8122c785b
2006-10-11Update for Atomic Coherece with Gabes busRon Dreslinski
--HG-- extra : convert_revision : 6a23052056d1c61cba0a4c77f1030cee419c6fa3
2006-10-11Interesting memtest finally.Ron Dreslinski
Get over 500,000 reads on each of 8 testers before memory leak becomes large. tests/configs/memtest.py: Update test to be more interesting --HG-- extra : convert_revision : 4258b798fbeeed2a376f1bfac100a109eb05620e
2006-10-11Merge zizzer:/n/wexford/x/gblack/m5/newmem_busRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 70187b8f04d0f8424512f64bdade05bf1aca85a3
2006-10-11Use bus response time paramteresRon Dreslinski
Fix bug with deadlocking src/mem/cache/base_cache.cc: Make sure to not wait anymore --HG-- extra : convert_revision : 5f7b44a1c475820b9862275a0d6113ec2991735d
2006-10-11Don't call recvRetry if the bus is busy anyway. This takes care of a corner ↵Gabe Black
case as well when dealing with grants that aren't used. --HG-- extra : convert_revision : 38f7ef1b41477fb2a2438387ef3a81cccd3e7a8a
2006-10-11Merge zizzer:/n/wexford/x/gblack/m5/newmem_busRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : d2d19b27533f35c6570ee84c6c83b2919f27b97f
2006-10-11Make the bus work if the other sides recvRetry doesn't call sendTiming for ↵Gabe Black
some reason. --HG-- extra : convert_revision : e722ddb0354a5c021dc7c44a3e2f0a64e962442b
2006-10-11When turning asserts into if's don't forget to invert.Ron Dreslinski
src/mem/cache/base_cache.cc: When turning asserts into if's don't forget to invert. Must be too sleepy. --HG-- extra : convert_revision : ea38d5a4b4ddde7b5266b3b2c83bbc256218af9a
2006-10-11Writebacks can be pulled out from under the BusRequest when snoops of ↵Ron Dreslinski
uprgades to owned blocks hit in the WB buffer --HG-- extra : convert_revision : f0502836a79ce303150daa7e571badb0bce3a97a
2006-10-10Only issue responses if we aren;t already blockedRon Dreslinski
--HG-- extra : convert_revision : 511c0bcd44b93d5499eefa8399f36ef8b6607311
2006-10-10Merge zizzer:/n/wexford/x/gblack/m5/newmem_busRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest src/mem/bus.cc: SCCS merged --HG-- extra : convert_revision : 18608114350c466a56ab499ae523b01fcb2f6ef2
2006-10-10Make the bus is occupied for none broadcast packets as well.Gabe Black
--HG-- extra : convert_revision : aef3c625172e92be8f29c4c57077fefee43046bb
2006-10-10Merge zizzer:/n/wexford/x/gblack/m5/newmem_busRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest src/mem/bus.cc: SCCS merged --HG-- extra : convert_revision : eaae105025635c37af06cf72bb061ce82def9dc9
2006-10-10Debugging infoRon Dreslinski
src/base/traceflags.py: Add new flags for cacheport src/mem/bus.cc: Add debugging info src/mem/cache/base_cache.cc: Add debuggin info --HG-- extra : convert_revision : a6c4b452466a8e0b50a86e886833cb6e29edc748
2006-10-10Put in an accounting mechanism and an assert to make sure something doesn't ↵Gabe Black
try to send another packet while it's still waiting for the bus. --HG-- extra : convert_revision : 4a2b83111e49f71ca27e05c98b55bc3bac8d9f53
2006-10-10Fixed a corner case and simplified the logic in Packet::intersect.Gabe Black
--HG-- extra : convert_revision : b57c31ca7c220e701d34e02bb07ce392370e4428
2006-10-10Merge zizzer:/n/wexford/x/gblack/m5/newmem_busRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 7b7a1b03ffed36bce49595962ea57c08d1d1a4ad
2006-10-10Some more code cleanupRon Dreslinski
src/mem/cache/base_cache.cc: Add sanity checks src/mem/cache/base_cache.hh: Fix for retry mechanism --HG-- extra : convert_revision : 9298e32e64194b1ef3fe51242595eaa56dcbbcfd
2006-10-10Changed the bus to use a bool to keep track of retries rather than a pointerGabe Black
src/mem/tport.cc: minor formatting tweak --HG-- extra : convert_revision : 7391d142815c5876fcc0f991bd053e6a1781c101
2006-10-10Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus --HG-- extra : convert_revision : aa59d3169d84bcd13b8c97f22b52aeef43dc33c3
2006-10-10Fix some more mem leaks, still some leftRon Dreslinski
Update retry mechanism src/mem/cache/base_cache.cc: Rework the retry mechanism src/mem/cache/base_cache.hh: Rework the retry mechanism Try to fix memory bug src/mem/cache/cache_impl.hh: Rework upgrades to not be blocked by slave src/mem/cache/miss/mshr_queue.cc: Fix mem leak on writebacks --HG-- extra : convert_revision : 3cec234ee441edf398ec8d0f51a0c5d7ada1e2be
2006-10-10Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus --HG-- extra : convert_revision : 4036e8447fb3038d93285c6582900210d7d88d67
2006-10-10Fix cshr Retry'sRon Dreslinski
Fix Upgrades being blocked by slave --HG-- extra : convert_revision : cca98a38e32233145163577500f1362cd807ab15
2006-10-10Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
into zeep.eecs.umich.edu:/home/gblack/m5/newmem_bus --HG-- extra : convert_revision : 6027c395af044858465eafd3ea78bcfe4c923bcc
2006-10-10Merge ktlim@zizzer:/bk/newmemKevin Lim
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem --HG-- extra : convert_revision : 8b27fc92f8aafe691d70dc654bff3798abf8e755
2006-10-10Updates refs.Kevin Lim
tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout: Update refs. --HG-- extra : convert_revision : 5341341507ddbe1211992e5f72013d7be0000bae
2006-10-10Merge zizzer:/z/m5/Bitkeeper/newmemRon Dreslinski
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/newmemcleanest --HG-- extra : convert_revision : 87f83c4edf6ea51adc767d98265d1e74c0fbb46f
2006-10-10Yet another fix to the HasData command attribute.Ron Dreslinski
--HG-- extra : convert_revision : dcf0d7eafa5168591c2b374b452821ca34dde7f9
2006-10-10Actually set the HasData attribute on Read ResponsesRon Dreslinski
--HG-- extra : convert_revision : 129dadbf8091ab00fb7f16eace59df265fc3718c
2006-10-10Fix another merge issueRon Dreslinski
--HG-- extra : convert_revision : 2b33da5e8578ea6a8bdd2d89f183c2e6b942b0fc
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 17:27:00 +0000