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2010-02-26cpu_models: get rid of cpu_models.py and move the stuff into SConsNathan Binkert
2010-02-26isa_parser: Make SCons import the isa_parserNathan Binkert
2010-02-26isa_parser: move the operand map stuff into the ISAParser class.Nathan Binkert
2010-02-26isa_parser: move more support functions into the ISAParser classNathan Binkert
2010-02-26isa_parser: move more stuff into the ISAParser classNathan Binkert
2010-02-26isa_parser: move the formatMap and exportContext into the ISAParser classNathan Binkert
2010-02-26isa_parser: Make stack objects class members instead of globalsNathan Binkert
2010-02-26isa_parser: add a debug variable that changes how errors are reported.Nathan Binkert
2010-02-26isa_parser: Use an exception to flag errorNathan Binkert
2010-02-26isa_parser: Move more stuff into the ISAParser classNathan Binkert
2010-02-26isa_parser: move code around to prepare for putting more stuff in the classNathan Binkert
2010-02-26isa_parser: simple fixes, formatting and styleNathan Binkert
2010-02-26events: Give EventWrapped a default name and descriptionNathan Binkert
2010-02-25configs: pull out cache configuration code from se.py and fs.py.Lisa Hsu
2010-02-25stats: update stats for the changes I pushed re: shared cache occupancyLisa Hsu
2010-02-24cache stats: account for writebacks and/or device occupancy in the cache.Lisa Hsu
2010-02-23cache: Make caches sharing aware and add occupancy stats.Lisa Hsu
2010-02-23stats: this makes some fixes to AverageStat and AverageVector.Lisa Hsu
2010-02-23cache: pull CacheSet out of LRU so that other tags can use associative sets.Lisa Hsu
2010-02-20BaseDynInst: Preserve the faults returned from read and write.Timothy M. Jones
2010-02-12O3PCU: Split loads and stores that cross cache line boundaries.Timothy M. Jones
2010-02-12BaseDynInst: Make the TLB translation timing instead of atomic.Timothy M. Jones
2010-02-12Power ISA: Add an alignment fault to Power ISA and check alignment in TLB.Timothy M. Jones
2010-02-10ruby: fixed data block assignment fixBrad Beckmann
2010-02-10ruby: Initialize sender in MI_example-dirBrad Beckmann
2010-02-10ruby: Fixed slicc to initialize the m_is_blocking flagBrad Beckmann
2010-02-01ruby: Added FS support to the simple mesh topologyBrad Beckmann
2010-02-01ruby: Set default protocol back to MI_exampleBrad Beckmann
2010-01-31mergeBrad Beckmann
2010-01-31m5: Added PROTOCOL default for regress fixBrad Beckmann
2010-01-31inorder: update hello world mipsKorey Sewell
2010-01-31inorder: vortex alpha regressionKorey Sewell
2010-01-31inorder: twolf alpha regressionKorey Sewell
2010-01-31inorder: update hello world alphaKorey Sewell
2010-01-31inorder: double delete inst bugKorey Sewell
2010-01-31inorder: inst count mgmtKorey Sewell
2010-01-31inorder: implement split storesKorey Sewell
2010-01-31inorder: implement split loadsKorey Sewell
2010-01-31inorder: add activity statsKorey Sewell
2010-01-31inorder: object cleanup in destructorsKorey Sewell
2010-01-31inorder: user per-thread dummy insts/reqsKorey Sewell
2010-01-31inorder: add execution unit statsKorey Sewell
2010-01-31inorder: recvRetry bug fixKorey Sewell
2010-01-31inorder-stats: add prereq to basic statKorey Sewell
2010-01-31inorder: ctxt switch statsKorey Sewell
2010-01-31inorder: pipeline stage statsKorey Sewell
2010-01-31inorder: enforce stage bandwidthKorey Sewell
2010-01-31inorder: set thread status'Korey Sewell
2010-01-31inorder: add/remove halt/deallocate context respectivelyKorey Sewell
2010-01-31inorder: track last branch committedKorey Sewell